Hi
Working on the STM32H743ZI - Ethernet transmission is working but reception not.
As shown below there are 4 rx buffer descriptors set up. Each with the DMA ownership, generate interrupt on completion and buffer 1 valid set in DESC3. DESC0 points to a log word aligned reception buffer in the same memory area.
All 4 buffer descriptor control words are set to 0x00000000 (by Ethernet DMA controller to indicate that it has received something).
DMACSR signals 0x00000080 (receive buffer unavailable) since all buffer descriptors are now full and presumably the Ethernet controller wanted to write more.
DMADSR signals that the receiver is suspended due to no more buffer descriptors being available.
There is no rx interrupt generated so the buffers can't be cleared by code. Also it is seen that no data was written to the first buffer descriptor's buffer (still all at 0x00) and no DMA errors are signaled.
It is as if the Ethernet DMA is trying to save the data but something is limiting the size fo each buffer to 0 (so it doesn't save anything, closes the buffer but is not complete and moves to the next - then repeats until all buffer descriptors are closed, but the frame not complete).
Note that DMACRxCR is set to a full Ethernet frame size and I don't find any further rx length limitations that may control this.
As noted, Tx works as expected - but the Rx operation not yet...
Can anyone explain what causes this so it can be corrected?
Thanks
Regards, Mark
