Zephyr SPI 1 issue after migration from F746zg to F756zg

[STM32Fuser]

Hi all
I migrated from a Nucleo F746zg to a F756zg. Code and overlay is the same except that I west build against F756zg. Now SPI 1 is not working properly anymore. On the scope I can see that SPI communication starts (CS goes low, MOSI byte is sent, MISO byte is sent back) but the transfer does not finish. I ran the same but using SPI 3 this worked flawlessly. Don't know maybe an APB or FIFO issue?
Anyone an idea?

Sorry, I forgot to say that I tested this with a Zephyr RTOS firmware (which worked with the F746zg) and as well with a simple straight forward Board-to-Board HAL_SPI_TransmitReceive Ping Pong F756zg (SPI 1 master) <-> F746zg (slave). Besides I want to mention that the same Ping Pong with F756zg (SPI 3 master) <-> F746zg (slave) worked flawlessly.

[STM32Fuser]

Actually it's a brand-new board directly from mouser. I kept care not to destroy it through an ESD incident nor was there any short or illegal voltage levels.

Update:
Could you provide me code for the F756zg (SPI1 Master) and F746zg (SPI1 Slave) where you know it definitely works? So I can check on my hardware.

[mƎALLEm]

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@STM32Fuser wrote:

Actually it's a brand-new board directly from mouser. I kept care not to destroy it through an ESD incident nor was there any short or illegal voltage levels.

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Humm.. Indeed that's weird .. 

[mƎALLEm]

Forget about SPI for now and try to toggle the IOs that are used with SPI (MOSI/MISO/CLK, CS if it was used) and see what happens with an oscilloscope. To ensure that the IOs are well connected to the board connector and they are functional.

[STM32Fuser]

Meanwhile I reduced the slew rates from "VERY_HIGH" to "LOW" on all outputs (master/slave). The overshoots are gone but the behaviour is the same as before.

[STM32Fuser]

I did that for PA4, PA5, PA6 and PB5 (the ones I use for SPI1). Set them as GPIO_outputs and toggled them every 1ms. Signal voltage levels and shapes look good.

[mƎALLEm]

What if you try another SPI instance, SPI2 for example?

[STM32Fuser]

I already did the test with SPI3. This worked successful. Therefore I was wondering if it has something to do with the APB2.

[mƎALLEm]

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@STM32Fuser wrote:

I already did the test with SPI3. This worked successful. Therefore I was wondering if it has something to do with the APB2.

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It couldn't. F746 and F756 share the same die. The only difference between the two part numbers is the HW crypto accelerator which is available only on F756.

So that shouldn't be an issue in the die itself ..

[STM32Fuser]

Thanks. I didn't know that.

[STM32Fuser]

My problem is that I can't simply change to another SPI because we have customer hardware which is attached over the morpho connector to the board - a redesign would be necessary.