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st25r3911b RX failed in FIFO reading

Gavin
Associate

Hi,

I'm surveying st25r3911b now. Currently, I have verified SPI, register read/write, IRQ handler, TX process, but not RX process.

So far, I can get the necessary IRQ, but I can't get the correct data in FIFO.

I make the following steps to test RX process:

  1. prepare TX data (13 bytes non-zero raw data) from one EVM, that can be triggered manually.
  2. perform TX process once.
  3. read FIFO data after IRQ RXS got.
  4. check RX log as following:

IRQ: 0x00001002

IRQ: 0x00000802

IRQ: 0x00001002

IRQ: 0x00000802

IRQ: 0x00001002

IRQ: 0x00000802

IRQ: 0x00001002

IRQ: 0x00000802

IRQ: 0x00001002

IRQ: 0x00000020

bytesToRead 3

bytesToRead 4

bytesToRead 3

bytesToRead 4

bytesToRead 2

bytesToRead 0

receive FIFOIndex: 16

received data:

0x0000 0x0000 0x0000 0x0000 

0x0000 0x0000 0x0000 0x0000 

0x0000 0x0000 0x0000 0x0000 

0x0000 0x0000 0x0000 0x0000 

IRQ: 0x00000812

About the log, I have two questions:

  1. In my understanding, the length of RX data is less than water level threshold, so it should be received in one FIFO reading, but it didn't happen in log.
  2. I just dump FIFO data in log. why the received data are all zero?

Is there any method to check this issue?

Does anyone have suggestion for me?

thanks

Gavin​

1 ACCEPTED SOLUTION

Accepted Solutions
Ulysses HERNIOSUS
ST Employee

Hi Gavin,

I_rxs is signaled on start-of-receive. At this time no data is yet expected inside the FIFO. Data inside the FIFO is expected to be read on receiving I_wl or I_rxe.

As to why the read data is all 0x00 please provide a logic analyzer trace of SPI + IRQ.

Regards, Ulysses

View solution in original post

1 REPLY 1
Ulysses HERNIOSUS
ST Employee

Hi Gavin,

I_rxs is signaled on start-of-receive. At this time no data is yet expected inside the FIFO. Data inside the FIFO is expected to be read on receiving I_wl or I_rxe.

As to why the read data is all 0x00 please provide a logic analyzer trace of SPI + IRQ.

Regards, Ulysses