LDL212

[amansinghaljpr]

LDL212-3.3v DFN (2x2) Running Superhot 

 With LDL212

1. Heat Dissipation (Power Dissipation)

The power dissipation PP can be calculated using the formula:

P=(VIN−VOUT)×IOUTP = (V_{IN} - V_{OUT}) \times I_{OUT}

Where:

• VINV_{IN} = 6.65V (input voltage)
• VOUTV_{OUT} = 3.3V (output voltage)
• IOUTI_{OUT} = 0.22A (output current)

P=(6.65V−3.3V)×0.22A=0.726WP = (6.65V - 3.3V) \times 0.22A = 0.726W

1. Junction Temperature (TJT_{J})

The junction temperature can be calculated using the formula:

TJ=TA+(P×θJA)T_{J} = T_{A} + (P \times \theta_{JA})

Where:

• TAT_{A} = Ambient temperature (let's assume 25°C)
• PP = Power dissipation (0.726W)
• θJA\theta_{JA} = Thermal resistance, junction-to-ambient (for LDL212 package, typically around 65°C/W)

TJ=25°C+(0.726W×65°C/W)=25°C+47.19°C=72.19°CT_{J} = 25°C + (0.726W \times 65°C/W) = 25°C + 47.19°C = 72.19°C

1. Case Temperature (TCT_{C})

TC=TA+(P×θJC)T_{C} = T_{A} + (P \times \theta_{JC})

Where:

• θJC\theta_{JC} = 15°C/W

TC=25°C+(0.726W×15°C/W)=25°C+10.89°C=35.89°C

All these numbers are theoritical 

But in reality the LDL runs in 44 degree zone and easily goes beyond 55 degrees with just 220mA of current , where the exposed pad is connected to GND Zone with an aproximate area of 150^2 mm.

Attaching the landing pattern as well 

[Peter BENSCH]

Welcome @amansinghaljpr, to the community!

Well, you are burning almost 750mW in a DFN 2x2. Have you determined the thermal resistance of the 150mm2 GND cooling area, which has to be added to Rthjc of the device?

Have you considered adding further cooling through thermal vias near the LDL212?

Regards
/Peter

[amansinghaljpr]

Hey @Peter BENSCH  , thanks for reply. 

I just wanted to verify a couple of things . 

1) Are my calculations correct ? 

2) I dont know the thermal resistance of that area , its just a big chunk of copper area connected to the exposed pad intended to increase the surface area for heat dissipation. I thought i had overdesigned , but after looking at the temp i guess some major issues going on 

3) Please enlighten me about any numbers i am missing out on 

Also is 750mW too much heat ? I thought a DFN 2x2 package should be capable enough to handle it 

I have added the schematic i am using as well just for your reference 

[Peter BENSCH]

1. Well, the complete consideration of the effective temperature, especially in your calculation 3 (you called it Case Temperature (TCT_{C})), also includes the thermal resistance of the cooling area, which still needs to be added. Using a thermal camera, you can then look at the heat distribution on the board and probably recognise a hotspot directly at the LDL212, while the temperature quickly decreases as the distance increases.
2. As already mentioned, it is advisable to calculate or simulate the thermal resistance of the cooling area. Regardless of this, you should use additional cooling area, e.g. on the other side of the board, and as many thermal vias as possible, especially in the close vicinity of the LDL212 to distribute the heat as widely as possible. You can also consider using a thicker copper layer, which makes the board more expensive but also improves the heat transfer to the cooling area (heat build-up around the LDL212).
3. With 150mm² you seem to have a lot of cooling surface, but as you realise, this is obviously not enough. The amount of heat generated and its removal is often underestimated. To get an impression of the heating of a device, it is sufficient to load e.g. an ohmic resistor with e.g. 750mW and measure the resulting temperature (or hold it in your fingers). You will find that the temperature is inversely proportional to the component size, which is simply due to the thermal resistance of the device (and also the thermal resistance of the environment, e.g. the fingers). Yes, the DFN 2x2 package can handle this power dissipation - if you ensure appropriate cooling.

4. Speaking of heat distribution: if you know the current consumption of your 3.3V load very well, you can possibly change R23 from 0ohms to a larger value. At 8.2ohms, for example, a voltage of 1.804V drops at 0.22A, i.e. a power loss of 397mW. The power dissipation that the LDL212 has to burn is then reduced by this value. Of course, you then have to use a resistor with a corresponding power capacity - and ensure that it is cooled. So the problem remains the same, it is just distributed.

Hope that helps?

Regards
/Peter

[amansinghaljpr]

@Peter BENSCH Thanks a lot for the prompt reply peter . 

So here's what i understand 

1) I am still yet to calculate or find out the thermal resistance of that PCB copper area , i know the thickness of the copper but i don't know the exact calculations for that . So I'll probably test that 

2) With the given power dissipation and the package size , is it okay expect for the temps to go upward of 55 degrees with whatever cooling capacity is given ? Which i just mentioned. (55 degrees was measured on top of casing of the ic ) 

3) Even if the DFN-2x2 package is capable of handling such powers , i could not find any recommended landing pattern or PCB layout guideline for the LDO , can you point me to any such ST whitepaper or Application note ? So that i can keep a note of this in the future . I thought i am consuming just 220mA and the LDO can take up to 1.2 A , i should probably be good with some copper area as a heat dissipation area . 

4) As of now if i don't have to fabricate a new PCB , i am already on my way of testing the series resistor to share the heat dissipation by dropping the input voltage . Would you recommend adding a heatsink on top of it ? Or what can be some other methods or suggestions you can give which do not involve a new design . 

And would you consider this a design "mistake" or just an "oversight" because we didn't have tools for thermal simulations and all to figure this out earlier before fabrication. 

[Peter BENSCH · Accepted solution]

1. OK, please test it.
2. The LDL212 is guaranteed to work up to 125 degrees (data sheet, table 2)
3. The thermal resistance is influenced by many factors: PCB material, number of layers, thickness of the copper layer, arrangement of thermal vias, convection of air around the cooling area, active or passive cooling, etc. For these reasons, there is no explicit suggestion for a layout recommendation.
   The device can of course handle currents up to 1.2A, but the power dissipation must be taken into account as with all LDOs and linear regulators. As a general rule (for any linear regulator): the higher the load current, the lower the differential voltage you can turn into heat.
4. I can't judge your board and the physical size of resistor R23, so I can't say anything about possible cooling. Actually, you just have to make sure that the amount of heat generated is dissipated, be it through appropriate component size, convection or active cooling.
   However, if you have planned a package size 01005 or 0201 for R23, it will probably be difficult with cooling.

[amansinghaljpr]

Hey so the resistor Idea worked for me and the heat is much better distributed between the series resistor and the LDO . From the next time I'll try to improve the layout to use the LDO without the series resistor