2025-05-04 10:39 PM
Hi
I am working on an application with wide VIN from 6V-60V and the target VOUT is 15V 3A max.
When VIN > 16V, L7987 should fit my application. Problem is that when VIN drops below 16V, eDesignSuite reports an error so simulation is not possible.
It states on L7987's datasheet that in case the input voltage falls close or below the programmed output voltage, L7987 is able to work in LDO mode. Am I correct? See screen capture of the datasheet below.
When L7987 works in LDO mode, does it mean the chip is able maintain Fsw with duty cycle lift to 100%?
What is the max. current in LDO mode?
Look forward to any comment.
John
2025-05-05 12:20 AM
Hi,
>L7987 is able to work in LDO mode.
Yes, but what you want then? Your 15V output can only be regulated, if Vin > 16V .
If your input is 6V, maybe you get some 5V output; for 15V you need a buck-boost design,
otherwise in 6...60V -> out 15V not possible.
>the chip is able maintain Fsw with duty cycle lift to 100%?
No, 92% is written there. The bootstrap cap still has to be loaded.
>What is the max. current in LDO mode?
What you set as the current limit. Same mosfet is switching, just now at about 92% duty.
2025-05-05 12:42 AM
Hi Ascha.3
Thanks a lot for your feedback. I understand that when VIN<15, the buck converter will not keep VOUT as 15V. The application is a charger for super capacitor array of 16.2V max. When VIN is less than 15V, say 9V, the capacitor array will be charged to 9V. That is acceptable for my application.
Now the major concern is the VOUT noise level when VIN<15V. Previously, I tested TI's LM5013 with VIN from 20V down to 6V. From a prototype hardware I found LM5013 stops switching at the programmed Fsw (300kHz); instead, the switching frequency drops to an audible frequency somewhere in 1kHz range. That is why I am asking about the FSW of L7987 when VIN<VOUT programmed.
It is a relief to learn that when VIN<15V, L7987 still switch at the programmed Fsw (250kHz ~ 1.5MHz) with duty cycle 92%. Thank you.
John
2025-05-05 12:59 AM
Hi,
>L7987 still switch at the programmed Fsw
no, i dont think so. Because the "normal" control loop no more working, its going to some "emergency" LDO behavior, so it might do the 1us bootstrap loading on a 12/13us speed, about 80kHz.
To know for sure, you have to test it in your hardware and see, you like it - or not.
2025-05-05 1:05 AM
Hi
I see ! A sw freq. of 80kHz is still OK because it is an audio application.
Any idea on the choice of bootstrap cap value in case I need to test the perform in hardware? Datasheet states a typical value of 100nF 10V 0603 ceramic cap.
2025-05-05 1:05 AM
However, you should also consider the conduction losses, as the high side MOSFET is specified with max 0.32ohms (specified for a test condition of 0.5A). The Rdson increases with the current, but there is no indication of this in the data sheet. However, you can assume the values of a comparable MOSFET, e.g. the STN2NF10, which would have an Rdson about 8% higher at 3A than at 0.5A, in this case about 0.346ohms.
Equation 29 of the data sheet indicates that you have to reckon with a power loss of 0.346ohms * 0.92 * 3A² = 2.865W. This loss creates a temperature difference of 114K with a thermal resistance of 40K/W on the STMicroelectronics demonstration board, resulting in a device temperature of 139°C at an assumed ambient temperature of 25°C.
So pay particular attention to really sufficient cooling!
Regards
/Peter
2025-05-05 1:17 AM - edited 2025-05-05 1:22 AM
@Peter BENSCH wrote:Rdson about 8% higher at 3A than at 0.5A
Thank you, Peter. The time limit with a current load of 3A shall not exceed a few seconds so, the temperature stress is not a lot. It happens when the supercap array has been deeply discharged. When it is, I expect L7987 will deliver up to 3A to charge the cap array at full power and then the current load will drop exponentially when it get charged.
Major concern now is the noise level when L7987 works in LDO mode.