2026-03-25 3:02 AM - last edited on 2026-03-25 3:35 AM by Andrew Neil
Hi,
I have STM32H755ZIT3 controller, and I am tying to read voltage sensor AMC1333M10 and sensor has internal clock of 10 MHz . I am trying to read on controller DFSDM channel 7, core M4 with clock 64 MHz . Is this practically possible to read in such a configuration ?
As when I read the value(dfsdm_buffer), it is always 7 (~0) whether there are voltages on the terminal or not.
Code:
// start
HAL_DFSDM_FilterRegularStart_DMA(&hdfsdm1_filter0, (int32_t *)dfsdm_buffer, BUFFER_SIZE);
// callback :
void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) {
...
}
Following is my configuration for DFSDM in MX :
Channel 7 : "PDM/SPI input form ch7 and external clock"
Channel 7 :
Channel 7 Parameters:
Type : "SPI with rising edge"
Offset : 0
Right Bit Shift : 0x00
Analog watchdog parameters:
Filter Order: "Sinc 3 filter type"
Oversampling: 1
Filter 0:
regular channel selection:
regular channel selection: "Channel 7"
Continuous Mode: "Continuous Mode"
Trigger to start regular conversion: "Software Trigger"
Fast Mode : "Disable"
Dma Mode: "Enable"
Injected channel selection: all 0 to 7 are set to "Disable"
Filter Parameters:
Sinc Order: "Sinc 3 filter type"
Fosr : 256
lost: 1
DMA Settings :
DMA Request : DFSDM1_FLT0
Stream : DMA1 Stream1
Direction: Peripheral to Memory
Priority: Low
DMA Request Settings:
Mode : Circular
Increment Address: Peripheral: unchecked, Memory: Checked
Use Fifo: unchecked, Data Width: Peripheral: Word, Memory: Word
DMA Request Synchronization settings : Nothing Selected.
NVIC settings under DFSDM1 :
DMA1 stream1 global interrupt : Enabled
DFSDM1 filter0 global interrupt : Enabled.
Thanks.
Edited to apply source code formatting - please see How to insert source code for future reference.