Having ADC Noise in my project

[eva_402]

Hi everyone,
I’m working on a battery monitoring prototype using an STM32F303. I’m measuring multiple analog voltages using the internal ADC with DMA. The ADC readings fluctuate by ±20 counts whenever the PWM output for the buck converter is enabled.

I already added averaging in firmware, but the noise is still visible. The analog input traces are routed near the switching MOSFET area on the PCB.

My questions:

1. Is this more likely caused by ADC sampling timing or switching noise coupling?
2. Would increasing ADC sample time help in this case?
3. On the PCB side, should I separate analog and power ground planes or just improve return current paths?

[Ozone]

> Is this more likely caused by ADC sampling timing or switching noise coupling?

Definitely the EMI from your switching MOSFETS.

> Would increasing ADC sample time help in this case?

No, not really. The cause is the EM energy injected into the ADC input tracks by dielectrical or magnetic means.
The caused interference (in ADC counts) depends on the timing of both signals, but longer sampling time allows for longer "signal coupling".

> On the PCB side, should I separate analog and power ground planes or just improve return current paths?

I am a software guy, but the best options are to either separate both components as far as possible on the PCB, including the tracks. High-current tracks need sufficient copper width, or else the resistance might cause GND potential offsets. The VDDA pin should be connected and supplied separately, to assure a stable power and VREF.

But you best option would be to keep the MOSFET switching part galvanically isolated.

[ahsrabrifat]

Most likely switching noise coupling from the buck converter, especially since your analog traces run near the MOSFET. I think problem is primarily PCB coupling .... ground bounce ..... secondarily ADC sampling timing.

Longer ADC sample time will help a little. A longer sample time can reduce source impedance effects and let the ADC settle better .... but it won’t fix noise injected from layout or switching edges. Read this guide, it has everything about ADC Source Impedance: https://www.ti.com/lit/an/spna061/spna061.pdf

About PCB: Improve return current paths first .... Keep analog ground clean .... use a solid ground plane, separate high-current switching loops from analog returns .... and join grounds at one controlled point if needed. Full split planes often create more problems unless done carefully. Read these guides to understand planes:

https://www.aivon.com/blog/pcb-design/the-art-of-grounding-pcb-ground-plane-techniques-for-analog-circuits/

https://www.pcbway.com/blog/Engineering_Technical/Routing_Layers_and_Ground_Planes__Power_Planes.html

Best practical fixes:

• Move analog traces away from SW node/MOSFET gate paths
• Minimize buck converter loop area
• Add RC filter on ADC inputs (e.g. 100 ohm + 100 nF)
• Sample ADC synchronized to PWM quiet time (mid-cycle)
• Use proper decoupling near MCU VDDA/VREF pins

[Mikk Leini]

It could be noise, but if you meaure battery voltage and buck converter is supplied by the same battery, then it could be natural to see the fluctuations. Depends a lot on the measurement point. So maybe you're power converter needs bigger and low-ESR capacitors.

But since PCB routing sounds already sketchy, then it's better to improve the HW design. Don't forget that beside  protecting measured signal from noise, ADC supply and reference voltage are equally important.

If you try to solve it with firmware only, then some MCU's have option to pick between external and internal reference voltages. Maybe you have this option and can pick less noisy reference.

Anyway, as I understand you're in prototype phase so it's better to solve it in hardware. AN2834 from ST is worth checking out.

Finally, if you want to measure lithium-based battery voltage to judge its capacity then friendly advice is to use fuel-gauge.