Guidance on I2C Pull-Up Configuration Issue – STM32U5A5QJI6Q (BGA Package)

[Sakthi_IND]

Hi Team,

We are currently working on a design using the STM32U5A5QJI6Q microcontroller in a BGA package, implemented on a 4-layer PCB. During the hardware development phase, we inadvertently omitted the external pull-up resistors on the I2C lines, specifically on PB6 (A5) and PB9 (A4), which are configured for I2C_SCL and I2C_SDA respectively.

Our software team has informed us that there is no option to enable internal pull-up resistors for these specific pins through software configuration. Given the constraints of the BGA package and the complexity of reworking inner-layer routing, we are seeking your expert guidance on the following:

1. Is it possible to enable internal pull-up resistors on PB6 and PB9 via software or alternate configuration?
2. If not, what are the recommended rework strategies for adding external pull-ups in a BGA-based 4-layer PCB design?
3. Any best practices or application notes that could assist in resolving this issue without a complete board redesign would be greatly appreciated.

We would be grateful for your support in helping us resolve this issue efficiently.

Thank you for your time and assistance.

Best regards,
Sathiya

[TDK]

You can use the internal ~40 kOhm pullup resistors with reduced I2C clock rate, maybe 10 kHz, and it'll work just fine.

I'd put a scope on SDA/SCL to verify edges are sufficiently fast for the clock rate you choose.

It's not ideal because your bus will be floating before the pins are initialized, but this will likely not be a problem. If it is and slaves are holding SDA low, SCL can be toggled to free up slaves.

[Andrew Neil]

Internal pullups are not suitable as I2C pullups - much too high resistance.

Does the I2C slave device(s) have accessible pins?

Are there testpoints on the I2C lines? Vias?

Nothing specific to STM32 here - this is just general prototype/rework stuff.

Image credit: https://www.circuitrework.com/services/circuit-board-modification.html