Posted on May 17, 2011 at 11:36 Hello,
I’m writing some self test for the ST9.
To implement these test I must place a part of the code at fixed address in the ROM.
I use the following linker script file:
MEMORY
{
FLASH2 : ORIGIN = 0x004000, LENGTH = 40K, MMU = IDPR1 IDPR2 IDPR3
FLASH3 : ORIGIN = 0x00E000, LENGTH = 8K,
RAM : ORIGIN = 0x200000, LENGTH = 4K, MMU = IDPR0
EEPROM : ORIGIN = 0x220000, LENGTH = 1K,
FECSR : ORIGIN = 0x221000, LENGTH = 4,
PROT : ORIGIN = 0x231ffc, LENGTH = 4,
REGFILE (t) : ORIGIN = 0x00, LENGTH = 0xb0 /* Groups 0 to 0x0B */
}
SECTIONS
{
.initF0 :
{ *(.F0init) } > FLASH2
.init :
{ *(.init) } > FLASH2
.text :
{ *(.text) } > FLASH2
.fini :
{ *(.fini) } > FLASH2
.secinfo :
{ CREATE_SECINFO_TABLE } > FLASH2
.rodata :
{ *(.rodata) } > FLASH3
.PCTest8 :
{ *(.PCTest
} > FLASH2
.PCTest9 0xF888:
{ *(.PCTest9) } > FLASH3
.PCTest10 0xF880:
{ *(.PCTest10) } > FLASH3
.PCTest11 0xF800:
{ *(.PCTest11) } > FLASH3
.PCTest12 0xF000:
{ *(.PCTest12) } > FLASH3
.PCTest13 0xE000:
{ *(.PCTest13) } > FLASH3
.PCTest14 0xC000:
{ *(.PCTest14) } > FLASH2
.PCTest15 0x8000:
{ *(.PCTest15) } > FLASH2
.RAMinit : AT (LOADADDR(.rodata) + SIZEOF (.rodata))
{ *(.RAMinit) } > RAM
.RAMtext : AT (LOADADDR(.RAMinit) + SIZEOF (.RAMinit))
{ *(.RAMtext) } > RAM
.StackTestStart 0x200202 :
{ *(.StackTestStart) } > RAM
.stack 0x200204 :
{ _stack_start = . ;
. = . + 100h ;
_stack_end = . ; } > RAM = 0x1234
.StackTestEnd :
{ *(.StackTestEnd) } > RAM
.data : AT (LOADADDR(.RAMtext) + SIZEOF (.RAMtext))
{ *(.data);
} > RAM
.bss :
{ *(.bss) *(COMMON) } > RAM
.RamTest0 0x200000:
{ *(.RamTest0) } > RAM
.RamTest1 0x200001:
{ *(.RamTest1) } > RAM
.RamTest2 0x200002:
{ *(.RamTest2) } > RAM
.RamTest3 0x200004:
{ *(.RamTest3) } > RAM
.RamTest4 0x200008:
{ *(.RamTest4) } > RAM
.RamTest5 0x200010:
{ *(.RamTest5) } > RAM
.RamTest6 0x200020:
{ *(.RamTest6) } > RAM
.RamTest7 0x200040:
{ *(.RamTest7) } > RAM
.RamTest8 0x200080:
{ *(.RamTest
} > RAM
.RamTest9 0x200100:
{ *(.RamTest9) } > RAM
.RamTest10 0x200200:
{ *(.RamTest10) } > RAM
.RamTest11 0x200400:
{ *(.RamTest11) } > RAM
.RamTest12 0x200800:
{ *(.RamTest12) } > RAM
.fardata : AT (LOADADDR(.data) + SIZEOF (.data))
{ *(.fardata) } > RAM
.reg16_data : AT (LOADADDR(.fardata) + SIZEOF (.fardata))
{ *(.reg16_data)} > REGFILE
.reg16_bss :
{ *(.reg16_bss)} > REGFILE
.reg8_data : AT (LOADADDR(.reg16_data) + SIZEOF (.reg16_data))
{ *(.reg8_data) } > REGFILE
.reg8_bss :
{ *(.reg8_bss)} > REGFILE
}
I see in the map file that the functions in the corresponding sections are linked to the expected address.
But my problem is that some functions who are normaly linked by the linker, are now overwrited by these fixed address functions.
For example a part of the resulting map file:
0x0000e000 .PCTest13 TST_PC_BIT_12
0x0000e000 .rodata crc_abCrcTabH
or
0x00007f9c .text crc_rGetOutCRC
0x00008000 .PCTest15 TST_PC_BIT_15
0x00008036 .text crc_rGetInCRC
where the funcion rGetOutCRC is 154 byte length
I have the same problem with RAM. The fixed variable overwrite some other variable.
Do I something wrong with the linker file ?
Can somebody please help me.
Thanks.
Chris
