2007-03-15 07:22 PM
Silicon Bug or mistake in Datasheet? on ETM_EXTRIG MII_MDC port 1.7
2011-05-17 12:39 AM
Port 1.7, aka ETM_EXTRIG or MII_MDC causes weird behavior if SCU_GPIOIN1.7 is not 1. Supposedly, if this bit is cleared, then nothing happens on this pin according to table 4 of the data sheet. However, if the MII is used, whenever a packet arrives, the debugger halts!
I looked at the documentation, and it seems there is a feature on Port 3.0 that has a similar feature. cf EXT_ETMT_EDBGR and P30_SELEDBG on SCU_SCR0. But Port 3.0 is not Port 1.7. Is there a mistake in the datasheet, table 4? Is the default input behavior of Port 1.7 actual ''External Debug Request''? Or is this a silicon bug?