2004-04-07 08:35 PM
2011-05-17 02:59 AM
Hi,
I’m using the folowing memory map: Main Flash: 0x0000 ~0xffff – Pag 0 Second Flash: 0x0000 ~0x1fff SRAM: 0xE000 ~0xffff If I’m running my IAP programming in the second Flash, can I accesses the main Flash and SRAM or I will have conflict problems ? I’m asking this because de SRAM is in the same adress of the main flash (0xE000 ~0xffff ). thanks2011-05-17 02:59 AM
2011-05-17 02:59 AM
Hi Asterix,
Thanks for your help, but I didn’t understand how to implement the item 2 – 3. Using the PSDsoft Express I can configure FS0 at 0-7FFF and FS1 at 8000-FFFF but how can I change it to be FS0 at 8000-FFFF and FS1 at 0-7FFF in execution time ? Is it possible ? Thanks Saul2011-05-17 02:59 AM
Hi Saul,
Detailing steps 2 and 3: In PSDSOFT, at the ''Define PSD Pin/ Node Functions'' main menu you define the functions of all the pins, then, at the next sub-menu ''Page Register Definition'', you select one pgr bit for paging: click the paging mark of pgr0. The next sub-menu is ''Chip Select Equations''. Click FS0 there: you get 3 lines. At the first line, set ''Page Number'' to 0, ''Hex Start Address'' to 0 and ''Hex End Address'' to 7FFF. At the second line, set ''Page Number'' to 1, ''Hex Start Address'' to 8000 and ''Hex End Address'' to FFFF. Leave the third line blank. Click now FS1, and repeat this operation, inverting the page numbers. You are done with PSDSOFT. At run time, you control the main flash page (from the secondary flash) using the ''Page'' register (CSIOP address = E0). I hope that this helps, Daniel