Complementary timer channels are not working in STM8S105.

[ankhola]

Hi guys,

Recently I have started to do some practical test with STM8S105. While trying to implement  PWM of TIM1 CH1 and CH2 with their complementary channels, it is seen that PWM pulses are generated only on main channels. Complementary channels are silent. Please see the code and suggest the way out.

#include "stm8s.h" 
void setup_clock(void) {
  
    CLK->ICKR |= CLK_ICKR_HSIEN; // Enable HSI
    while (!(CLK->ICKR & CLK_ICKR_HSIRDY)); 
    CLK->CKDIVR = 0x00;
    CLK->SWR = 0xE1; 
                                       }

void setup_gpio(void) {
    GPIOC->DDR |= (GPIO_PIN_1 | GPIO_PIN_2);
    GPIOC->CR1 |= (GPIO_PIN_1 | GPIO_PIN_2);
    GPIOC->CR2 |= (GPIO_PIN_1 | GPIO_PIN_2); 

    
    GPIOB->DDR |= (GPIO_PIN_0 | GPIO_PIN_1);
    GPIOB->CR1 |= (GPIO_PIN_0 | GPIO_PIN_1);
    GPIOB->CR2 |= (GPIO_PIN_0 | GPIO_PIN_1); 
                                        }

void setup_tim1_complementary_pwm(void) {
    TIM1->CR1 &= ~TIM1_CR1_CEN; 
CLK_PeripheralClockConfig(CLK_PERIPHERAL_TIMER1, ENABLE);

    TIM1->PSCRH = 0x00; 
    TIM1->PSCRL = 0x00;

    TIM1->ARRH = 639 >> 8;
    TIM1->ARRL = 639 & 0xFF; 

    

    TIM1->CCR1H = 100 >> 8; 
    TIM1->CCR1L = 100 & 0xFF; 
    TIM1->CCMR1 = 0x68; 
    TIM1->CCMR1 |= 1<<3; 
    TIM1->CCER1 |= TIM1_CCER1_CC1E; 
    TIM1->CCER1 |= TIM1_CCER1_CC1NE;

    
    TIM1->CCR2H = 300 >> 8; 
    TIM1->CCR2L = 300 & 0xFF; 
    TIM1->CCMR2 = 0x68; 
    TIM1->CCMR2 |= 1<<3; 
    TIM1->CCER1 |= TIM1_CCER1_CC2E; 
    TIM1->CCER1 |= TIM1_CCER1_CC2NE; 

    
    TIM1->DTR = 0x10;  
    TIM1->BKR |= TIM1_BKR_MOE; 

    TIM1->EGR |= TIM1_EGR_UG; 
    TIM1->CR1 |= TIM1_CR1_CEN; 
}

void main(void) {
    setup_clock();
    setup_gpio();
    setup_tim1_complementary_pwm();

    while(1) {
        
    }
}

#ifdef USE_FULL_ASSERT
void assert_failed(uint8_t* file, uint32_t line)
{
  while (1)
  {
		
  }
}
#endif

[AA1 · Accepted solution]

Complementary channels are only available if enabled in Option Bytes OPT2 AFR5. See STM8S105x4/6 datasheet page 49.

AFR5 Alternate function remapping option 5
0: AFR5 remapping option inactive: Default alternate function.(2)
1: Port B3 alternate function = TIM1_ETR; port B2 alternate function = TIM1_CH3N; port B1 alternate function = TIM1_CH2N; port B0 alternate function = TIM1_CH1N.

Did you enable them in Option Bytes?

[ankhola]

Thanks. Enabling relevant Option Bytes, complementary channels are working.