how to read stable adc value? upsd3234

[wdcai]

Posted on June 28, 2004 at 08:58

how to read stable adc value? upsd3234

[wdcai]

Posted on May 17, 2011 at 12:01

I have read some prevous articles about ADC problem in this forum, pin69 (80pin package) is an analoge ground,and shouldn't be connected with other digital gnd pins ,but this SPEC is not mentioned in the datasheet,is it true?

Thanks!

[wdcai]

Posted on May 17, 2011 at 12:01

Hi,all

I can 't read stable ad value from upsd3234, Vref pin is connected with 2.5V(lm285-2.5),and a 1.543V battery is connected to adc3 channel, the adc3 value is from 150 to 164 (the true value should be 157) and the value of adc0 channel is from 0 to 20, the four channels are read form adc0 to adc3, it seems the the adc0 is affacted by adc3, the sample and hold circuit in the upsd3234 can't release the voltage of adc3 when it is switched to adc0. How can I get stable value and decrease the inter-influence bwteen two channels such like adc0 and adc1 or adc3 and adc0? Thanks!

[wdcai]

Posted on May 17, 2011 at 12:01

Hi,All

Can anyboady know this problem? thanks!

[danielh1]

Posted on May 17, 2011 at 12:01

When you switch from one A/D channel to the other, you must wait some time for the A/D to settle before starting a new conversion. Nothing is written about in the datasheet, and I couldn't get any information from this forum in the past. Just try: start with 100 microseconds, and if you get a stable reading, try reducing the wait time.

Good luck, Daniel

[wdcai]

Posted on May 17, 2011 at 12:01

Thanks! I have delayed 1 ms before a new conversion, but still can't read stable value, all ground pins in Upsd are connected with ground plane in my PCB board, So I guess digital and analog ground may be the key factar to this problem,But I can't find any AGND pin mentioned in Upsd datasheet.

Thanks agian! good luck to you!

[hanan54]

Posted on May 17, 2011 at 12:01

hi

Try to change ADC clock freq ( ADC_CLOCK_DIVIDER) for 30Mhz I try ADC_CLOCK_DIVIDER = 0x3 ADCPS =0x08 + ADC_CLOCK_DIVIDER; // Enable ADC clock, setup ADC clock freq hanan

[wdcai]

Posted on May 17, 2011 at 12:01

Can any ST engneer give me some advice?

[wdcai]

Posted on May 17, 2011 at 12:01

In my design, Fosc = 11.0592M,So I think it needn't change the value! In the DEMO program provieded by ST upsd CDROM, the demo board runs in 40M,so it need change this value about 6M.

Thanks!

[hanan54]

Posted on May 17, 2011 at 12:01

hi

If the ADC_CLOCK_DIVIDER=0 in your design then ADC clock frequency is 11.0592M. Try ADC clock frequency = 2 to 5 Use also averaging of 20 reading. I also have ADC problem. Today I change ADC clock frequency to 3.5 and the change is +-10mv (before it was +-30mv), but I have a problem. Every time I turn off, the power and then turn It on, the voltage read from the A/D is stable but in different voltage (around the input supply voltage). There is an offset between power up. hanan [ This message was edited by: hanan54 on 28-06-2004 12:31 ] [ This message was edited by: hanan54 on 28-06-2004 12:36 ][ This message was edited by: hanan54 on 28-06-2004 12:36 ]