2008-02-19 04:47 AM
BSPI on STR7x. How can I detect finish of transmition?
2008-02-18 02:58 AM
Hi,
I have a problem with BSPI on my STR711. I am not being able to detect by software when the transition of a byte is totally finished. My code is: GPIO_Config (GPIO0, 0x00FF, GPIO_AF_PP); BSPI_BSPI0Conf(ENABLE); /* Enable the BSPI0 interface */ BSPI_Init(BSPI0); /* Initialize BSPI0 */ BSPI_ClockDividerConfig ( BSPI0,12); /* Configure Baud rate*/ BSPI_Enable ( BSPI0 , ENABLE ); /* Enable BSPI0 */ BSPI_MasterEnable ( BSPI0,ENABLE); /* Configure BSPI0 as a Master*/ BSPI_ClkActiveHigh(BSPI0,DISABLE); BSPI_ClkFEdge(BSPI0,DISABLE); BSPI_8bLEn(BSPI0,ENABLE); /* Set the word length to 8 */ BSPI_TrFifoDepth(BSPI0,4); /* Depth 4 bytes */ BSPI_RcFifoDepth(BSPI0,4); while(1) { BSPI_WordSend (BSPI0,BufferTx[0]); BSPI_WordSend (BSPI0,BufferTx[1]); BSPI_WordSend (BSPI0,BufferTx[2]); BSPI_WordSend (BSPI0,BufferTx[3]); /////////////////////////////////////////////////////////////////////// // HERE, HOW CAN I KNOW THE TRANSMITION OF THE 4 BYTES IS FINISHED ??? // ?????????????????? /////////////////////////////////////////////////////////////////////// } } What I should to put in my code to detect it? Trying with TUFL or TFE flags on BSPI Control/status register 2 is not working properly for me. Could you kindly help me? Thanks a lot2008-02-18 04:03 AM
SPI is always bi-directional, even if you are only sending data. Every byte clocked out also clocks in a data byte. You can check for an end of transmission when you read in the (unused) data clocked in after sending a byte out.
2008-02-18 04:10 AM
Thanks for your reply,
I'm triyng to check the flag RFNE (receive FIFO not Empty) is this form: while (((BSPI0->CSR2 & 0x0008)==0) {asm(''nop'');} It works fine if I only send a byte. But If I send several bytes, I go out of this ''while'' before the transmission is complete. I dont undestand why. I appreciate you help. ALFA.2008-02-19 04:47 AM
It sounds like a latency issue. It takes time to clock data in, so if you just poll the flags you get an empty FIFO flag before the receive byte is moved into the FIFO. Your polling loop is too fast. It might work better if you simply wait for the receive byte, since you know it MUST arrive after sending a byte out.
This is how I do it on an STR750:Code:
GPIO_WriteBit(GPIO0, GPIO_Pin_4, Bit_RESET); // NSS* on, start command while(count) { SSP_SendData(SSP0, *byte); /* Send byte through the SSP0 peripheral */ while(SSP_GetFlagStatus(SSP0, SSP_FLAG_TxFifoEmpty) == RESET); /* Loop while Transmit FIFO is full */ while(SSP_GetFlagStatus(SSP0, SSP_FLAG_RxFifoNotEmpty) == RESET); /* Loop while Receive FIFO is empty */ dummy = SSP_ReceiveData(SSP0); /* discard the byte read from the SPI bus */ byte++; count--; // one less byte out } GPIO_WriteBit(GPIO0, GPIO_Pin_4, Bit_SET); // NSS* off, end command This example runs at 7.5Mhz for the SPI clock frequency so there is little delay (latency) between sending and receiving. The slower the SPI clock frequency the more it will be a problem. You might need to add a final loop after the last byte was sent out to ensure the receive FIFO is emptied, or you can count bytes received. In the example above I'm not too concerned about when the transmission is finished, as I also check to make sure the SPI FIFO is empty before starting a new transmission.