2020-06-05 02:32 AM
Hello,
I am measuring acceleration with LSM6DSOX.
On account of unknown frequencies in measurement I want to know the relation between ODR and sampling rate.
I found in https://www.st.com/resource/en/application_note/dm00571818-lsm6dsox-alwayson-3d-accelerometer-and-3d-gyroscope-stmicroelectronics.pdf on page 18/19 some information about the sampling UI chain.
I am using accelerometer in high performance mode, accordingly anti-aliasing filter is enabled.
Is there also a sample & hold circuit in use?
Is anti-alias filtering accomplished by oversampling the signal?
Which is the frequency the signal is getting sampled with?
Does sampling frequency change by adjusting another ODR?
Thanks!
2020-06-05 08:01 AM
Hi @amuel.1 , please note that some of the requested info could not be publicly available. Which is your specific application for which you need these kind of info? Btw, here below you can find some
Is there also a sample & hold circuit in use?
No, there is no internal S&H circuit, because the processing "flow" is from analog to digital conversion.
Is anti-alias filtering accomplished by oversampling the signal?
Internal filter design, with its intrinsic low pass transfer function, allows to remove the anti-alias filter.
Which is the frequency the signal is getting sampled with?
The nominal value of the internal clock oscillator is 5.12MHz, but it can be calibrated during production testing.
Does sampling frequency change by adjusting another ODR?
Yes, the sampling frequency remains the same: the decimation factor (or the number of averaged samples) change accordingly.
Regards