2025-07-21 9:26 AM
Hello
I have a problem with the accelerometer lsm303agr and the Fifo Stream mode, I have a time offset between 2 watermark interrupts.
Configuration :
- accelerometer only
- watermark interrupt enable on int1
- bdu enable
- Stream mode enable
- Fifo enable
- Don't used any gesture recognition, or filter.
- i use the spi mode at 500khz
Description of the problem :
I used the accelerometer in Fifo Stream mode, the watermark to fire the interrupt on pin int1 when a certain number of data in the Fifo is reached.
The odr is at 1hz, i used the rtc of the stm32 (from a homemade board) to collect the timestamp when INT1 trigger.
I have notice a time offset for every sample in addition of the ODR configured.
I measured it to be around 25ms/samples on top of my 1seconds period (odr 1hz).
I checked the timing at the oscilloscope which confirmed that the problem Don't come from the reading of the rtc but from the lsm303agr.
for example :
With a watermark to store/collect 2 samples from the Fifo, in theory i should have the interruption triggering every 2sec But This is not the case, i have 2sec+(25ms*2samples) = 2.050sec.
With 30samples watermark, I'm at 750msec offset.
I checked and rechecked the configuration of the registers, can't see anything wrong. I tried different ODR, the offset is still there but smaller, look like is proportional to the odr.
Does someone have any ideas what the problem can be?
Thanks
2025-07-23 2:06 AM
Hi @max34900 ,
Ensure that after reading the FIFO data, you properly clear the interrupt flag by reading the FIFO level or the interrupt source register. If the interrupt is not cleared promptly, the timing of subsequent interrupts may be affected.
Did you follow section 4.8.3 of the application note?
2025-07-23 5:38 AM
hi
Thanks for the reply, I'm in "Stream mode" not in "Stream-to-FIFO mode", but anyway I tried both cleaning methods (of the "Stream-to-FIFO mode") and it doesn't work.
cheers
2025-07-28 2:05 AM
Hi @max34900 ,
Can you share your settings?
Thanks
2025-07-28 7:05 AM
hi, thanks
ok, my setting for the registers (in the table ) is :
ODR = 1hz
OVRN flag used (which means 32 samples in fifo before interruption on INT1)
fifo enable in "Stream mode"
The column "before setting odr", is the values of the registers with the accelerometer in "power-down mode", the column "After setting ODR", is when i configure the accelerometer at ODR 1Hz, and the fifo start to fill.
cheers
Register | Register address (hex) | Before Setting ODR : value register (HEX) | After setting ODR (1hz) value register (HEX) |
STATUS_REG_AUX_A | 0x07 | 0x00 | 0xFF |
OUT_TEMP_L_A | 0x0C | 0x00 | 0x00 |
OUT_TEMP_H_A | 0x0D | 0x00 | 0x00 |
INT_COUNTER_REG_A | 0x0E | 0x00 | 0x00 |
TEMP_CFG_REG_A | 0x1F | 0xC0 | 0xC0 |
CTRL_REG1_A | 0x20 | 0x07 | 0x17 |
CTRL_REG2_A | 0x21 | 0x00 | 0x00 |
CTRL_REG3_A | 0x22 | 0x02 | 0x02 |
CTRL_REG4_A | 0x23 | 0x09 | 0x09 |
CTRL_REG5_A | 0x24 | 0x40 | 0x40 |
CTRL_REG6_A | 0x25 | 0x00 | 0x00 |
REFERENCE/DATACAPTURE_A | 0x26 | 0x00 | 0x00 |
STATUS_REG_A | 0x27 | 0x00 | 0xFF |
FIFO_CTRL_REG_A | 0x2E | 0x80 | 0x80 |
FIFO_SRC_REG_A | 0x2F | 0x20 | 0x9E |
INT1_CFG_A | 0x30 | 0x00 | 0x00 |
INT1_SRC_A | 0x31 | 0x00 | 0x00 |
INT1_THS_A | 0x32 | 0x00 | 0x00 |
INT1_DURATION_A | 0x33 | 0x00 | 0x00 |
INT2_CFG_A | 0x34 | 0x00 | 0x00 |
INT2_SRC_A | 0x35 | 0x00 | 0x00 |
INT2_THS_A | 0x36 | 0x00 | 0x00 |
INT2_DURATION_A | 0x37 | 0x00 | 0x00 |
CLICK_CFG_A | 0x38 | 0x00 | 0x00 |
CLICK_SRC_A | 0x39 | 0x00 | 0x00 |
CLICK_THS_A | 0x3A | 0x00 | 0x00 |
TIME_LIMIT_A | 0x3B | 0x00 | 0x00 |
TIME_LATENCY_A | 0x3C | 0x00 | 0x00 |
TIME_WINDOW_A | 0x3D | 0x00 | 0x00 |
Act_THS_A | 0x3E | 0x00 | 0x00 |
Act_DUR_A | 0x3F | 0x00 | 0x00 |