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lsm303agr accelerometer problem fifo stream mode, period not at 1/odr

max34900
Associate II

Hello

I have a problem with the accelerometer lsm303agr and the Fifo Stream mode, I have a time offset between 2 watermark interrupts.


Configuration :
- accelerometer only
- watermark interrupt enable on int1
- bdu enable
- Stream mode enable
- Fifo enable
- Don't used any gesture recognition, or filter.
- i use the spi mode at 500khz

Description of the problem :
I used the accelerometer in Fifo Stream mode, the watermark to fire the interrupt on pin int1 when a certain number of data in the Fifo is reached.

The odr is at 1hz, i used the rtc of the stm32 (from a homemade board) to collect the timestamp when INT1 trigger.

I have notice a time offset for every sample in addition of the ODR configured.

I measured it to be around 25ms/samples on top of my 1seconds period (odr 1hz).

I checked the timing at the oscilloscope which confirmed that the problem Don't come from the reading of the rtc but from the lsm303agr.

for example :
With a watermark to store/collect 2 samples from the Fifo, in theory i should have the interruption triggering every 2sec But This is not the case, i have 2sec+(25ms*2samples) = 2.050sec.

With 30samples watermark, I'm at 750msec offset.

I checked and rechecked the configuration of the registers, can't see anything wrong. I tried different ODR, the offset is still there but smaller, look like is proportional to the odr. 

 

Does someone have any ideas what the problem can be?

 

Thanks

 

 

 

4 REPLIES 4
Federica Bossi
ST Employee

Hi @max34900 ,

Ensure that after reading the FIFO data, you properly clear the interrupt flag by reading the FIFO level or the interrupt source register. If the interrupt is not cleared promptly, the timing of subsequent interrupts may be affected.

Did you follow section 4.8.3 of the application note?

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

hi

Thanks for the reply, I'm in "Stream mode" not in "Stream-to-FIFO mode", but anyway I tried both cleaning methods (of the "Stream-to-FIFO mode") and it doesn't work.

cheers

Hi @max34900 ,

Can you share your settings?

Thanks

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

hi, thanks

ok, my setting for the registers (in the table ) is :

ODR = 1hz

OVRN flag used (which means 32 samples in fifo before interruption on INT1)

fifo enable in  "Stream mode" 

The column "before setting odr", is the values of the registers with the accelerometer in "power-down mode", the column "After setting ODR", is when i configure the accelerometer at ODR 1Hz, and the fifo start to fill.

 

cheers

 

RegisterRegister address (hex)Before Setting ODR : value register (HEX)After setting ODR (1hz) value register (HEX)
STATUS_REG_AUX_A0x070x000xFF
OUT_TEMP_L_A0x0C0x000x00
OUT_TEMP_H_A0x0D0x000x00
INT_COUNTER_REG_A0x0E0x000x00
TEMP_CFG_REG_A0x1F0xC00xC0
CTRL_REG1_A0x200x070x17
CTRL_REG2_A0x210x000x00
CTRL_REG3_A0x220x020x02
CTRL_REG4_A0x230x090x09
CTRL_REG5_A0x240x400x40
CTRL_REG6_A0x250x000x00
REFERENCE/DATACAPTURE_A0x260x000x00
STATUS_REG_A0x270x000xFF
FIFO_CTRL_REG_A0x2E0x800x80
FIFO_SRC_REG_A0x2F0x200x9E
INT1_CFG_A0x300x000x00
INT1_SRC_A0x310x000x00
INT1_THS_A0x320x000x00
INT1_DURATION_A0x330x000x00
INT2_CFG_A0x340x000x00
INT2_SRC_A0x350x000x00
INT2_THS_A0x360x000x00
INT2_DURATION_A0x370x000x00
CLICK_CFG_A0x380x000x00
CLICK_SRC_A0x390x000x00
CLICK_THS_A0x3A0x000x00
TIME_LIMIT_A0x3B0x000x00
TIME_LATENCY_A0x3C0x000x00
TIME_WINDOW_A0x3D0x000x00
Act_THS_A0x3E0x000x00
Act_DUR_A0x3F0x000x00