I configured the device and I am able to read XYZ data by polling the status register 0x27 and reading data when it is ready. I read more than 32 samples of each. Then I tried to turn on the FIFO and setup Interrupt 1 for the I1_Overrun. I wasn't getting interrupts so I decided to take a step back and just try the FIFO and poll the FIFO SRC register to get that working first. I am enabling the FIFO in control register 5 before I set the FIFO mode in the FIFO control register. Then I read the OVRN_FIFO bit but is never set. so I checked the FIFO Control register and read 0x00 after setting it to 0x40. I am referring to App Note 3308 startup sequence in section 4 but the FIFO registers aren't listed there to know when to set those. The FIFO mode section of the LIS2DE12 data sheet just says how to turn on the FIFO but not in what order relative to the other registers.
Here are my steps to read data that works:
Read register 0x0F - 0x33
Write Control register 1 - 0x07 // I can enable interrupts in register 3 before setting ODR
Write Control register 2 - 0x00
Write Control register 3 - 0x00 // Interrupts need to be set before ODR
Write Control register 4 - 0x00
Write Control register 5 - 0x00 // Enable FIFO
Write Control register 1 - 0x3F // Lpen and ODR.
Loop: Poll Status register and read 6 bytes with with 0xA8 (0x28|0x80)
Here are my steps for the FIFO:
Read register 0x0F - 0x33
Write Control register 1 - 0x07 // I can enable interrupts in register 3 before setting ODR
Write Control register 2 - 0x00
Write Control register 3 - 0x00 // Interrupts need to be set before ODR
Write Control register 4 - 0x00
Write Control register 5 - 0x40 // Enable FIFO
Write Control register 1 - 0x3F // Lpen and ODR.
Write FIFO Control Register - 0x40 // FIFO mode 01
Read FIFO Control Register - 0x00 but expecting 0x40 so do I have another setting wrong that my write didn't take?
Read FIFO SRC Register- 0x20 but expecting 0x40 to indicate there are 32 samples to be read.
I tried reading 6 bytes with with 0xA8 (0x28|0x80) anyway but it returns 0x00.
What am I doing wrong? And after I get the FIFO working do I just set the bit in Control register 3 to cause an interrupt on INT 1?
thanks,
Kim
