2024-07-08 06:54 AM
Hi All,
We are implementing a custom PCB which includes an ISS3DWB which sits alongside an EEPROM chip on the same SPI bus. The bus master is a STM32F405.
The design will has separate CS pins for each device, chances are the EEPROM will only be communicated with every so often and the primary use of the SPI bus is to get the acceleration data from the IIS3DWB.
When the CS pin of the IIS3DWB is held in idle (high) does the SDO pin go high-z and allow other devices (in the case of a multi slave SPI bus) to take control??
I know the EEPROM we have chosen (25LC1024) will work on a multi-slave bus.
Any pointers would be much appreciated.
Cheers all!
2024-07-08 06:58 AM
@IBoddy wrote:When the CS pin of the IIS3DWB is held in idle (high) does the SDO pin go high-z and allow other devices (in the case of a multi slave SPI bus) to take control??
it certainly should do - as that is fundamental to the operation of SPI as a bus !