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How to effectively use lis2dw12 to detect motionless event ?

SLin.11
Associate II

Hi All,

I need a mechanism to detect motionless for 10s to make device enter power saving mode.

For lis2dh12, I can use HPF with low x,y,z threshold and duration to detect an event that motionless for 10s.

However I need more low power accelerometer lis2dw12 to do same thing but it seems lis2dw12 design can only detect wake up event, is there correct configuration to detect motionless for 10s event ?

What I need is:

active: Hi

motionless for > 10s: Lo

BR,

Sam

1 ACCEPTED SOLUTION

Accepted Solutions
Eleon BORLINI
ST Employee

Hi Sam @SLin.1​ ,

you could try to exploit a combination of the Activity/inactivity function and the Stationary/motion-detection function described in the datasheet p.17 and in the application note p.34.

You can first configure the stationary/motion function:

The Android stationary/motion detection function only recognizes the device’s sleep state [it doesn't change the device configuration after the condition detection]. When the Android stationary/motion-detection function is activated by setting the STATIONARY bit in WAKE_UP_DUR (35h), the LIS2DW12 detects acceleration below a fixed threshold but does not change either ODR or operating mode (High-Performance mode or Low-Power mode) after sleep state detection. The Activity/Inactivity recognition function can use the high-pass filter or the offset outputs, this choice can be made through the USR_OFF_ON_OUT bit in CTRL7 (3Fh).

Once you get the stationary/motion interrupt, you can set the activity/inactivity function to enter the low power mode (that you can configure) and to enable the device for a potential future wake-up:

When the activity/inactivity function is activated by setting the INTERRUPTS_ENABLE bit in CTRL7 (3Fh) and the SLEEP_ON bit in WAKE_UP_THS (34h), the LIS2DW12 automatically goes to 12.5 Hz ODR in the low-power mode previously selected by the LP_MODE[1:0] bits in CTRL1 (20h) if the sleep state condition is detected and wakes up as soon as the interrupt event has been detected, increasing the output data rate and bandwidth. With this feature the system may be efficiently switched from low-power mode to full performance depending on user-selectable positioning and acceleration events, thus ensuring power saving and flexibility.

You can find two C sample codes on Github for setting these configurations, and you could build a custom code combining the two:

If this answer helped you, please select this as best.

-Eleon

View solution in original post

6 REPLIES 6
Eleon BORLINI
ST Employee

Hi Sam @SLin.1​ ,

you could try to exploit a combination of the Activity/inactivity function and the Stationary/motion-detection function described in the datasheet p.17 and in the application note p.34.

You can first configure the stationary/motion function:

The Android stationary/motion detection function only recognizes the device’s sleep state [it doesn't change the device configuration after the condition detection]. When the Android stationary/motion-detection function is activated by setting the STATIONARY bit in WAKE_UP_DUR (35h), the LIS2DW12 detects acceleration below a fixed threshold but does not change either ODR or operating mode (High-Performance mode or Low-Power mode) after sleep state detection. The Activity/Inactivity recognition function can use the high-pass filter or the offset outputs, this choice can be made through the USR_OFF_ON_OUT bit in CTRL7 (3Fh).

Once you get the stationary/motion interrupt, you can set the activity/inactivity function to enter the low power mode (that you can configure) and to enable the device for a potential future wake-up:

When the activity/inactivity function is activated by setting the INTERRUPTS_ENABLE bit in CTRL7 (3Fh) and the SLEEP_ON bit in WAKE_UP_THS (34h), the LIS2DW12 automatically goes to 12.5 Hz ODR in the low-power mode previously selected by the LP_MODE[1:0] bits in CTRL1 (20h) if the sleep state condition is detected and wakes up as soon as the interrupt event has been detected, increasing the output data rate and bandwidth. With this feature the system may be efficiently switched from low-power mode to full performance depending on user-selectable positioning and acceleration events, thus ensuring power saving and flexibility.

You can find two C sample codes on Github for setting these configurations, and you could build a custom code combining the two:

If this answer helped you, please select this as best.

-Eleon

Hi Sir,

Thanks for your help. I think p.33 Figure 14 of app note helps a lot.

However there is something to feedback

a. there should be more highlight that you need to enable both INT_SLEEP_CHG and INT_SLEEP_STATE to get INT_SLEEP_STATE pulse.

(I tried hours only enable INT_SLEEP_STATE but got nothing)

b. about the SLEEP_DUR, LSB is 512/ODR, so I cannot use 12.5Hz ODR to achieve 10s sleep duration (512/12.5 ~ 40s), I think this LSB is too large for realistic use.

Anyway thanks for your help.

BR,

Sam

Hi @SLin.1​ ,

>> a. there should be more highlight that you need to enable both INT_SLEEP_CHG and INT_SLEEP_STATE to get INT_SLEEP_STATE pulse.

Could the two codes posted above help you for this?

>> b. about the SLEEP_DUR, LSB is 512/ODR, so I cannot use 12.5Hz ODR to achieve 10s sleep duration (512/12.5 ~ 40s), I think this LSB is too large for realistic use.

Ya, this feature has been thought for long sleep durations... for shorter time intervals, ODR should be increased...

-Eleon

Hi Sir,

For a. I think it should be clearly documented in datasheet instead of only in ap note.

If I missed ap note and follow only datasheet I'll never get it out.

BR,

Sam

I absolutely agree with you.  I just experienced the same issue with AIS2DW12.  According to the datasheet it seems to be 2 different features working separately.  Both bits should have been named INT2_SLEEP[1:0] with a table like this: 0 0 = Disabled, 0 1 = Sleep State Change Enabled (1.2ms pulse generated), 1 0 = Disabled, 1 1 = Sleep State Enabled.  

 

 

 

Hi @Eleon BORLINI 

Apologies for chiming in on this 3 years later.

I have a few questions, regarding the solution above.

>>Once you get the stationary/motion interrupt

a. Which interrupt would this be?  Can you direct me to the bit of the specified register?

b. Regarding the activity/inactivity recognition (pg.32 of AN5038) , it states that the LIR BIT of CTRL3 must be set to zero. How could I work around this, if I am using a FIFO mode of bypass-to-continuous which requires the LIR bit to be set to 1?

I was thinking that the bit can be set to zero in the ISR of the INT2_SLP_CHG, but the device probably needs to be configured with the LIR bit set to zero, for the INT2_SLP_CHG to even occur. 

Regards,