2019-05-21 05:26 PM
Hello,
I am currently trying to transmit CAN frames from my SPC570S-DISP board. The board is connected to a verified working CAN node that is expecting frames at 500 kbps. I am able to write to the CAN buffers and get the CAN core to transmit, but it transmits the same nonsensical frame regardless of the input parameters (data, ID, RTR, IDE, SRR, length).
To send these frames, I configure the CAN core to the timing settings I need, then I configure a TX and RX MB, then I write the data and ID to a TX MB, then I set the TX MB code to 0x0C to initiate a transmission. I then await for the TX MB code to return to 0x08, which never happens. I observe the following frame on my scope, repeated every 4 ms or so:
The bit widths are as expected: multiples of 2 us. The first dominant section is 17 bits long, followed by repeated patterns of 25 bits recessive and 1 bit dominant. No matter what settings I put into the TX MB, the result is the same. What additional settings need to be set for the transmission to go through correctly? My source code follows:
#include "main.h"
int main(void)
{
// Clock init from SPC5Studio
clock_init();
// Pin D9: CAN 0 RX
SIUL2.MSCR_MUX[512-512].R = 0x01; // Input mux to FlexCAN0-RX
// Pin D10: CAN 0 TX
SIUL2.MSCR_IO[PD10].R = IO_SSS(0x01); // Output mux from FlexCAN0-TX
SIUL2.MSCR_IO[PD10].B.OERC = 0x03; // Set output strength to very strong
SIUL2.MSCR_IO[PD10].B.ODC = 0x02; // Enable push-pull output
// Init interrupt vector table (no interrupts are used in this program)
INTC_IACKR = (uint32_t)_vectors;
irq_disable();
SPC5_FLEXCAN0_ENABLE_CLOCK();
FLEXCAN_0.CTRL.B.CLK_SRC = 0x01; // Bus clock (40 MHz) straight from xtal
for (int i = 0; i < 32; i++)
{
FLEXCAN_0.MB[i].MB_CS.R = 0; // Clear all message buffers
}
FLEXCAN_0.MCR.B.MDIS = 0x00; // Enable module
FLEXCAN_0.MCR.B.SRX_DIS = 0x01; // Disable self-receive
FLEXCAN_0.MCR.B.MAXMB = 0x1F; // 32 max message buffers
FLEXCAN_0.CTRL.B.PRESDIV = 0x03; // Clock prescaler
FLEXCAN_0.CTRL.B.PROPSEG = 0x05; // Propagation segment
FLEXCAN_0.CTRL.B.PSEG1 = 0x07; // Phase segment 1
FLEXCAN_0.CTRL.B.PSEG2 = 0x04; // Phase segment 1
FLEXCAN_0.CTRL.B.RJW = 0x01; // Resync jump width
FLEXCAN_0.RXGMASK.R = 0x00000000; // Global mask: accept all frames
FLEXCAN_0.MB[15].MB_CS.B.CODE = 0X04; // Enable a RX message buffer
FLEXCAN_0.MB[14].MB_CS.B.CODE = 0x08; // Enable a TX message buffer
FLEXCAN_0.MCR.B.HALT = 0x00; // Take out of freeze mode
irq_enable();
while(true)
{
irq_disable();
FLEXCAN_0.MB[14].MB_CS.B.CODE = 0x08; // Deactivate message buffer, just in case
FLEXCAN_0.MB[14].MB_ID.R = 0x02020202; // Set ID
FLEXCAN_0.MB[14].MB_DATAH.R = 0x12345678; // Set data
FLEXCAN_0.MB[14].MB_DATAL.R = 0x9ABCDEF0; // Set data
FLEXCAN_0.MB[14].MB_CS.R = 0x0C680000; // SRR=1, IDE=1, LENGTH=8, start tx (CODE=C)
irq_enable();
while (FLEXCAN_0.MB[14].MB_CS.B.CODE != 0x08); // Await tx end
}
}
When I use the example code provided with spc5studio, I observe the same results.
Thank you for your insight!
Anton
Solved! Go to Solution.
2020-02-24 10:46 AM
I did get this issue fixed, it was a gpio/hardware issue. I needed to ensure that weak pullup was active for the SPC CAN TX/RX pins, that the push/pull output was enabled for TX, that the CAN bus was terminated, and that both the TX and the RX pins are linked.
It looks like the CAN core relies on the CAN RX pin to mirror what the TX pin is saying in order to function correctly, so it's important that both directions signals are going correctly.
2019-07-17 08:05 AM
Hello anton ,
Did you solve your issue ?
Best regards
Erwan
2020-02-21 12:31 AM
Hello Anton,
were you able to solve this problem? I have a very similar problem. (https://community.st.com/s/question/0D50X0000C9dqh0SQA/spc570sdisp-board-flexcan-sends-bad-frames-independent-of-can-parameters)
Best regards
Ben
2020-02-24 10:46 AM
I did get this issue fixed, it was a gpio/hardware issue. I needed to ensure that weak pullup was active for the SPC CAN TX/RX pins, that the push/pull output was enabled for TX, that the CAN bus was terminated, and that both the TX and the RX pins are linked.
It looks like the CAN core relies on the CAN RX pin to mirror what the TX pin is saying in order to function correctly, so it's important that both directions signals are going correctly.
2020-02-24 10:46 AM
Yes, please see my post. Best of luck!
2020-02-26 01:07 AM
Hello Azayt ,
Good news to see that you solve your issue
is it this option ?
Best regards
Erwan
2020-02-26 02:51 AM
Hello Anton,
thank you for your answer! I tried it with these settings but unfortunately it hasn't solved my issue yet:
// Pin D9: CAN 0 RX
SIUL2.MSCR_MUX[512 - 512].R = 0x01; // Input mux to FlexCAN0-RX
SIUL2.MSCR_IO[57].B.IBE = 0x01;
SIUL2.MSCR_IO[57].B.WPUE = 0x01;
// Pin D10: CAN 0 TX
SIUL2.MSCR_IO[58].R = 0x00000001UL; // Output mux from FlexCAN0-TX
SIUL2.MSCR_IO[58].B.OERC = 0x03; // Set output strength to very strong
SIUL2.MSCR_IO[58].B.ODC = 0x02; // Enable push-pull output
SIUL2.MSCR_IO[58].B.WPUE = 0x01;
But perhaps other parts of my setup don't fit.
Best regards
Ben
2020-12-29 10:33 PM
HI Azayt.5
I'm trying to be setting the FlexCAN in spc570S...
I have a question to be fixed about setting the flag CAN Frame Error.
What is to be fixed about the CAN Frame Error of the SPC570S?
Could you help me to do a set about CAN?
It's so difficult for me.....
Thank you.
ps. I was checked your post about FlexCAN, but it's not doing.