STM32 MPUs Products and hardware related

Hello,I have 7 ADC channel , and its configue as interrupt. But the interrupt each is get generated for different condition how I can check the which ADC channel interrupt is get generated which I have to use the function for distinguish the ADC channel. can you help me ?

I've followed all the steps from:https://wiki.st.com/stm32mpu/wiki/STM32MP15_Discovery_kits_-_Starter_Packagehttps://wiki.st.com/stm32mpu/wiki/PC_prerequisiteshttps://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_PackageCreating openstlinux-5.10-dunfell-mp1-21-03-31 distribution installation,with bitbake st-image-weston, error rises:(..layers/meta-openembedded/meta-oe/dynamic-layers/meta-python/recipes-extended/mozjs/mozjs_60.9.0.bb:do_compile) failed with exit code '1'Tried:bitbake -b mozjs -D -f bitbake mozjs -c cleanall bitbake mozjs -c compilebut the same error occurs.Also tried these solutions from the forum, without any success (the error is the same):mozjs60.9.0.bb returens error while compile (st.com)mozjs_60.9.0.bb:do_compile failed with exit code '1 (st.com) This is my 3rd attempt with a fresh Virtual Machine (Ubuntu 20.04.2.0 LTS), i'm pretty sure I've followed all the steps.For the Virtual Machine I have the following specs:Cores: 6Ram: 4.5GBDisk Space: 300

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Hi everyone,I am thinking about using STM32MP1 for a smart wearable device, like a smart watch to run some machine learning algorithm. is it possible? is the battery able to support MPU?Does anyone know any product already used STM32MP1? it would be great help for me.Thanks very muchJane

Hello,I tried to enable spread spectrum for PLL1 by adding a csg line to the TF-A DeviceTree:pll1:st,pll@0 { compatible = "st,stm32mp1-pll"; reg = <0>; cfg = < 1 49 0 1 1 PQR(1,0,0) >; csg = < 60 600 SSCG_MODE_CENTER_SPREAD >; };I tried several different settings including one without any csg configuration. Each measurement (spectrum analyzer + nerafield probe) shows the exact same spectrum.Are there any additional settings I need to apply?

Hi,on a custom board with a STM32MP153AABxx and a W63AH6NBV 1Gbit LPDDR3 memory I am failing to initialise the DDR properly. I made the required changes to the upstream u-boot device tree files, added support for UART8 debug console and some minor things and compiled the SPL. I enabled the DDR interactive console and loaded SPL to the MPU using STM32 cube programmer CLI. STPMIC1 is properly configured, 1V2 and 1V8 DDR power rails are present. So far, so good. Trying DDR tests one-by-one, all are failing.LPDDR3 is wired according to AN5031 (Rev 4), section 10.1.7. I tried ODT both grounded and connected to the MPU. Routing should be OK.In addition to this, I tried to use CubeMX DDR Test Suite. Having a running SPL I managed to connect to it. The tool correctly recognises the DDR as:Config name: LPDDR3 16bits 533000kHz DDR Size: 1 GBits DDR Frequency: 533.0MHzThen it stops cooperating with:Exception in thread "Thread-4843" java.lang.ArrayIndexOutOfBoundsException: Index 1 out of bounds f

HiWe are using stm32mp157a processor in our custom board.we have an 3 port Ethernet switch(KSZ9893RNXIA) with spi interface to processor.We enable Ethernet switch using spi.Read and write to switch is working properly.But we when we connect Ethernet cable to board we have set ipaddr and try to ping the pc in Uboot. But It is not pinging and it is showing phy_conncet() failed.We are configuring switch in rmii mode with 100mbps speed.Processor specific dtsi file :ethernet0: ethernet@5800a000 {                       compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";                       reg = <0x5800a000 0x2000>;                       reg-n

Hi,During the actual production of our stm32mp157c products we do intend to use the HSM flow.But for now I am simply trying to test the SSP flow with some debug (development) keys and without access to an HSM.I went over:https://www.st.com/resource/en/application_note/an5510-overview-of-the-secure-secret-provisioning-ssp-on-stm32mp1-series-stmicroelectronics.pdfandhttps://www.st.com/resource/en/user_manual/dm00403513-stm32-trusted-package-creator-tool-software-description-stmicroelectronics.pdfbut unfortunately there is not much information regarding the STM32_Programmer_CLI.exe "-ssp" command with "hsm" flag equal to "0" (HSM not used)only:"<license_path|slot=slotID>: path to the license file (if hsm=0)reader slot ID if HSM is used (if hsm=1)"I don't quite understand exactly what "license file" I need to provide the command.And also, if HSM is not used, how will the ST MPU decrypt the data file (OTP keys) ? I am assuming it is somehow related to this license file ? because in th

Hi STM-Team,We have the custom board based on the STM32MP157C-Eval board.In that, we are not able to access the eMMC from u-boot command prompt. Currently, we are booting from SD card and able to access it from u-boot command prompt.We are able to see the 2 mmc devices but not able to access eMMC on dev-1. Please see below logs:-----------------------------------------STM32MP> mmc listSTM32 SD/MMC: 1STM32 SD/MMC: 0 (SD)STM32MP> mmc dev 0switch to partitions #0, OKmmc0 is current deviceSTM32MP> mmc dev 1<No output from this command>-------------------------------------------But, with same configurations, we are able to access and create partitions of eMMC through fdisk command from filesystem command prompt. Also, see the below kernel boot-up logs:-------------------------------------------[  3.976158] mmc1: new DDR MMC card at address 0001[  3.989649] mmcblk1: mmc1:0001 IB2916 14.6 GiB[  3.994868] mmcblk1boot0: mmc1:0001 IB2916 partition 1 4

Hello I created own machine based of seeed module. at the strartup there is info NOTICE: CPU: STM32MP157CAC Rev.B   NOTICE: Model: STMicroelectronics custom STM32CubeMX board - openstlinux-5.10-dunfell-mp1-21-03-31   WARNING: VDD unknown   INFO: Reset reason (0x15):   INFO: Power-on Reset (rst_por)   INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe3000   INFO: FCONF: Reading firmware configuration information for: stm32mp_io   INFO: Using SDMMC   INFO: Instance 1   INFO: Boot used partition fsbl1   NOTICE: BL2: v2.4-r1.0(debug):v2.4-dirty   NOTICE: BL2: Built : 16:43:51, Nov 17 2020   INFO: BL2: Doing platform setup   INFO: RAM: DDR3-DDR3L 16bits 533000kHz   WARNING: Couldn't find property st,phy-cal in dtb   ERROR: DDR addr bus test: can't access memory @ 0xc0000004   PANIC at PC : 0x2ffedb39       Exception mode=0x00000016 at: 0x2ffedb39I'm pretty new in li

Hi Nicolas L (ST Employee),I have read the past article that you provide sources and directives to allow building the Android 10 delivery for the STM32MP157C-DK2.Could you please send me the solution?I hope you will be able to reply to me.By the way, can you find out my email in any way?Thanks & Regards,Hiromichi,

I am trying to create a custom board that boots from SDcard if an SDcard is plugged in, however, if the SDcard is not plugged in I would like the board to boot from the NAND. I want to do this programmable without the boot switch.Is this possible? Is there a sample project somewhere or some documentation?

I'm working with the DevBoard from Myir MYD-YA-157C which has the stm32mp157 MPU. I'm trying to chech the i2c from the M4 in the Engineering mode and have a problem.When I tied the I2C_TwoBoards_ComIT, it works. At least it generates the I2C5_ER_IRQ.But when I move to the i2c2 or any other with pins that I have out, it doesn't work. Just doesn't do anything, doesn't send anyithng and doesn't generate an interrupt.It is a simple test without any other peripherial enabled.Could you help me what is wrong.static void MX_I2C2_Init(void) {   hi2c2.Instance = I2C2; hi2c2.Init.Timing = 0x00701837; hi2c2.Init.OwnAddress1 = 783; hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_10BIT; hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; hi2c2.Init.OwnAddress2 = 0; hi2c2.Init.OwnAddress2Masks = I2C_OA2_NOMASK; hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; if (HAL_I2C_Init(&hi2c2) != HAL_OK) { Error_Handler(); }  

I've added OPENAMP through the middleware after enableing the IPCC interrupts, but now I'm getting the following error and an error in the actual OPENAMP source that's included!/opt/st/stm32cubeide_1.8.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/bin/ld: ./Core/Src/main.o: in function `main':/home/mschem/Gown-Sealer/STM32/sealer/CM4/Debug/../Core/Src/main.c:127: undefined reference to `MX_OPENAMP_Init'/opt/st/stm32cubeide_1.8.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/bin/ld: /home/mschem/Gown-Sealer/STM32/sealer/CM4/Debug/../Core/Src/main.c:172: undefined reference to `OPENAMP_check_for_message'/opt/st/stm32cubeide_1.8.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.

Install the SDKSimple Hello World ApplicationI have followed all the steps for installing the SDK and verified the environment variables for the cross compiler. I use a make file and it generates a binary. The problem is it generates a binary for x86-64 even when it is being directed to use the arm-ostl-linux-gnueabi-gcc (GCC) 9.3.0 cross compiler. Output of file:"gtk_hello_world: ELF 64-bit LSB shared object, x86-64, version 1 (SYSV), dynamic                       ally linked, interpreter /lib64/ld-linux-x86-64.so.2, BuildID[sha1]=ac39231d6a72                       8870d0248017a6c9cd25d9f02eab, for GNU/Linux 3.2.0, not stripped"I haven't just used gtk either, a simple printf application with stdio.h will also compile for x86-64 and not the intended cross comp

Hi all,I am using MPU ref. STM32MP153F, do you say me what is the time that elapsed between a tamper is detected and the backup resister are finishing erased?And the backup SRAM?Thank you in advance

Hi everyone!I want to use a hardware semaphore to access SRAM4 memory from both Linux and M4 firmware on STM32MP157A-DK1 board. There are no problems with the M4 firmware. But for Linux I have to create a driver. There is an example in this article: https://wiki.st.com/stm32mpu/wiki/Hardware_spinlock_overview But according to this example, I can't choose the number of the hardware semaphore that I want to use. I ask for advice on how best to organize what I want to do. Maybe I can use a hardware semaphore from user space?

HiWe are using stm32mp157a-dk1 board.We are writing code in bare metal.Its working fine when we run in SRAM.But when we jump to DRM its hanging.

The STM32MP157 demands a maximum time of 10 ms from reset command to boot partition data. According to JEDEC No 84-B51 the maximum time from reset command to the first data is up to 1 second (tBD):All data sheets of eMMCs that I found specify their boot timing according to the JEDEC spec. I don't understand how I can ensure that eMMC boot works reliable for all devices.in the field. Can you please help me?Do I understand it right or is there a solution available?

Hi,I want to make a bare-metal application (without Linux OS) on a STM32MP157C-DK2 Board.I need to use the usb host controller from this board (that why I choose it: multiples USB socket) but in the projects created with CubeIde, I can only assign USBH_HS1 or USB_OTG_HS with the A7 runtime context and my application C code is under the folder project_CM4 wich seem related to only M4 context and not with A7 context So, my question is simple: could we use a USB mass storage device with a bare-metal application on STM32MP157C-DK2 Board  without a Linux distrib?I am wondering because I can’t find either a HAL USB module as expected in the “stm32mp1xx_hal�?  list as if the only appropriate way to manage usb was with an OS attached to cortec A7Thanks in advance for any help

Are there any plans to support the STM32MP157F-DK2 board in mainline (vanilla) U-Boot?It's supported in the ST fork from U-Boot, but with an older version from U-Boot from the year 2020.Could also ask this in the U-Boot mailing list.

I am using a KSZ9021GN PHY in MII mode. Due to supply chain issues we had to resort to this PHY. (Cube MX says I can't use GMII mode). I am experiencing this apparently common issue: [ 15.650981] dwmac4_dma_reset err [ 15.652849] stm32-dwmac 5800a000.ethernet: Failed to reset the dma [ 15.659006] stm32-dwmac 5800a000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed [ 15.668518] stm32-dwmac 5800a000.ethernet eth0: stmmac_open: Hw setup failed I have read over https://wiki.st.com/stm32mpu/wiki/Ethernet_overview#How_to_debugand it says typically that the clock(s) are not present at reset, but I am not clear on what clocks are involved in MII mode. Any thoughts on what might be wrong?

Is micro python an option?

I have to design a system, where a STM32MP157, with its embedded Cortex M4, communicate with other clients over a high-speed serial connection. There should be a 10 : 1 serializer for the MOSI line, and a 1 : 10 deserializer for the MISO line (from the STM32MP15x perspective).While the transmission from the STM32MP15x via the serializer looks doable with the FMC address lines, I am looking for a reasonable fast way to read the asynchronous data from the deserializer. After I read the app note AN5020 Digital camera interface (DCMI) on STM32 MCUs, I think this could be a way.The idea is: When data arrive via the deserializer, these are clocked into the DCMI, DMA transfered and a interrupt is generated.When the DCMI is configured as 8 bit, external syncronized, with 8 Databit, HSYNC and VSYNC and the clock, could this work even with long "blanking peroides" (Where VSYNC indicates no data)? Question 1: Is there a limit on the length of the blanking periods of the DCMI?Question 2: Must a pe

We want to use FFmpeg for video processing (encoding, decoding, scaling, format convertion, etc) on a STM32MP157C based custom board. I understand STM32MP157C has a display controller and a Vivante GPU that supports OpenGL-ES and OpenVG to accelerate graphics-based applications.We are not using any display (LCD/HDMI) with the board and the display controller is disabled in device tree.We want to use the GPU's hardware acceleration feature for video processing through FFmpeg.We will compile the FFmpeg from source and want to include STM32MP157C GPU Hardware accelerator, that can be access by "-hwaccel" option in ffmpeg command.We don't know yet how to implement this. I looked at PM0263 (STM32MP157 GPU application programming manual) but not much helpfull.Is there any OpenGL API that exposes GPU's hardware acceleration that we can integrate with ffmpeg?Has anyone used STM32MP157C GPU with FFmpeg or any video processing application?Any help is much appreciated.