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Hi, I have an issue with my project. It is bare metal project. When Im configuring clock the boards is failing in SystemClock_Config().I tried to copy the setup from BSP_BasicTemplates. But the results is the same.Here is the error I get on console.Info : New GDB Connection: 1, Target STM32MP135FAFx.cpu, state: haltedError: timeout waiting for DSCR bit changeError: Error waiting for InstrCompl=1Error: Error waiting for cortex_a_exec_opcodeError: timeout waiting for DSCR bit changeError: Error waiting for InstrCompl=1Error: timeout waiting for DSCR bit changeError: Error waiting for InstrCompl=1Error: Error waiting for dpm prepareError: timeout waiting for DSCR bit changeError: Error waiting for InstrCompl=1Error: Error waiting for cortex_a_exec_opcodeWarn : keep_alive() was not invoked in the 1000 ms timelimit. GDB alive packet not sent! (4013 ms). Workaround: increase "set remotetimeout" in GDBBut when Im running the BSP_BasicTemplates example there is no issue.
Hello everyone,I would like to ask if it is possible to configure the STM32MP157F-DK2 to boot from a USB SSD instead of an SD card. If so, could you please share the steps or documentation?Thank you in advance!Best regards,Symeon Zapsis
I installed the distribution package using the stm32mp257f-ev board, but eth1 is visible but eth2 is missing. How do I activate both end0 and end1 in yocto.
Hi All,I am working on enabling and testing the LCD (RGB666) and backlight (enable and pwm) functionality on my STM32MP1 platform in U-Boot. I have configured the necessary U-Boot options for LCD and video support, including backlight control and display configuration, but I would like some clarification and guidance on the following:Is it possible to test the LCD display in U-Boot?Can I use the lcdputs command for basic testing, such as writing simple text to the display? If so, how should it be used correctly?How can I verify that the backlight is working in U-Boot?Does U-Boot provide any commands (e.g., vidinfo) to check video or LCD configuration?I created custom u-boot recipe and .cfg file, can you check the attached rar?Regards
Looking at the u-boot driver (drivers/watchdog/stm32mp_wdt.c), it seems to hard code the prescaler to /256.There is no warning if the maximum timeout is set. The linux driver seems to handle values up to the maximum of 131 seconds. Is there some reason u-boot needs to do this when the hardware supports longer timeouts ? static int stm32mp_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) { struct stm32mp_wdt_priv *priv = dev_get_priv(dev); int reload; u32 val; int ret; /* Prescaler fixed to 256 */ reload = timeout_ms * priv->wdt_clk_rate / 256; if (reload > RLR_MAX + 1) /* Force to max watchdog counter reload value */ reload = RLR_MAX + 1; else if (!reload) /* Force to min watchdog counter reload value */ reload = priv->wdt_clk_rate / 256; ...
Hi there, I am working on a product where we use the STM32MP157C for our purposes At the moment we have the UART4 attached to A7. I wanted to move it to M4 so that I can start seeing the serial logs coming out of M4 rather than the A7 which is running Linux. So I loaded the .ioc file onto the STM32CubeIDE 1.16.1. I have attached a screenshot of the current configuration on A7 herewith. I then deselected the A7 and selected M4 as shown in the attachment. Saved the .ioc file, regenrated the code and compiled it. But when I try rebooting the STM32MP157C it seems like few early boot messages comes on the serial but then after few seconds it seems to be rebooting and the same few lines keeps coming. I am not sure what I am doing wrong.But I have noticed this error message on CubeMxIDE:When I try to move the UART4 from A7 to M4 and select Asynchronous mode it shows an error in HW flow control which like this: HW Flow Control (RS232) Conflict with SDMMC1: Mode MMC 8 bit Wide Bus or/and A
As reported in the GitHub page, STM32PRGFW-UTIL should work with boards with USB DFU or UART serial interface.It works properly with UART, but it doesn't with USB DFU, showing the following error: Download in Progress: ██████████████████████████████████████████████████ 100% File download complete Time elapsed during download operation: 00:00:00.681 RUNNING Program ... PartID: :0x01 Error: Unable to reconnect the target device: time out expired Error: Start operation failed at partition 0x01 Error: TSV flashing service failed The code seems to ignore USB requests, since GetCommandOpcode is not defined: static OPENBL_OpsTypeDef USART_Ops = { OPENBL_USART_Configuration, NULL, OPENBL_USART_ProtocolDetection, OPENBL_USART_GetCommandOpcode, OPENBL_USART_SendByte }; static OPENBL_OpsTypeDef USB_Ops = { OPENBL_USB_Configuration, NULL, OPENBL_USB_ProtocolDetection, NULL, NULL };void OPENBL_CommandProcess(void) {
Hi,We are wondering that do we support to boot uboot from nand flash then boot into OS from external PCIE SSD driver.Is that workable to support this case by changing codes on stm32mp257 platform? Thanks.
Hello: I am debugging the network development of STM32MP135 bare metal, using the protocol stack LWIP+FreeRTOS, and I have implemented the LWIP transplantation of dual network ports under FreeRTOS, and can successfully PING the IP of the two network ports, but there is a problem when using iperf to test the speed, as follows: Because STM32MP135 supports dual Gigabit Ethernet, I use RGMII to connect two Gigabit PHY chips (YT8531) on my board (the development board here can refer to MYD-YF13X development board). Now when using iperf to test the speed of two Gigabit Ethernets, I find that the speed is very slow, only about 10Mbps as a server, and only 240Mbps as a client. The above results are the results after optimizing the relevant TCP parameters and DMA descriptors in the lwipopt.h file, and the Gigabit function cannot be achieved at all; In addition, if the Gigabit PHY is forced to be used as a 100M PHY, PING can be successful, and the iperf speed test also has a speed of 95Mbps,
I'm testing STM32MP157A for our new projects. The MPU VCC is 1V8, USB is 3V3. Debugger is connected to two SWD pins. One of first test is:boot into DFU loader, upload simple code to 0x2ffc2500:S_GPIO_ALT(GPIOA,13,2); S_GPIO_ALT(GPIOA,14,2); RCC->MCO1CFGR = 0x10f0; RCC->MCO2CFGR = 0x10f0; for (;;);S_* are obvious macros setting MODER and ALT registersthe code is uploaded by dfu-util -d 0483:df11 -a 1 -D boot_test.stm32So far so good, code is started, I can see 4 and 25MHz at PA13/14.in openocd I did: > bp 0x2ffc25e0 4 hw breakpoint set at 0x2ffc25e0 stm32mp15x.cpu0 rev 5, partnum c07, arch f, variant 0, implementor 41 stm32mp15x.cpu0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT target halted in ARM state due to breakpoint, current mode: Supervisor cpsr: 0x400001d3 pc: 0x2ffc25e0 MMU: disabled, D-Cache: disabled, I-Cache: disabledIt seems ok. I tested AXI access, confirmed that I'm in TZ secure state, can read even ROM firmware.Openocd polls MP1 every 100ms by 2
HiI plan to interface the MT9M001 CMOS sensor (Parallel Interface) with STM32MP135F-DK, but the development board comes with the MIPI CSI2 Interface. Please guide me as to the process of integration and using OpenCv. Thanks
We are using STM32MP!57A processor in our custom board. In this we are unable to read the internal ADC values in our cards. Actually, we initialize the internal ADC pins in cortex-M4 core with support of STM32CUBEMX and debug in CubeIDE1.9.0V. We get all on board reference voltages, Analog voltages at channel pins. Unable to read in software, may be what could be the issue?regards Srikanth
Hello everybody,I am developing a custom board strongly inspired by the STM32MP157D-DK1, except that I use a parallel DPI RGB on 24bit display.I use openstlinux-6.1-yocto-mickledore-mpu-v24.06.26.The frequency of "LTDC_CLK" changes by itself after waking up from "deep suspend".Before putting it into "deep suspend", I measure 31.65Mhz which corresponds well to what is expected for "innolux,at070tn92"But after waking up, i measure 86.21Mhz and this is completely outside the display specifications.All other frequencies changed in the same proportion "HSYNC", "VSYNC", ...Here is the configuration in the kernel and u-boot DTS file : panel_at070tn92: panel_at070tn92@0 { compatible = "innolux,at070tn92"; enable-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>; power-supply = <&vdd>; status = "okay"; port@0 { reg = <0>; panel_in: endpoint { remote-endpoint = <&ltdc_ep0_out>; }; }; }; &ltdc{ pinctrl-names = "default
Hi,I tried to update the DTS to make use of the adapter but unfortunately without success. These are the change I made:hdmi-out { compatible = "hdmi-connector"; type = "a"; port { hdmi_con: endpoint { remote-endpoint = <&adv7533_out>; }; }; }; &dsi { phy-dsi-supply = <&reg18>; #address-cells = <1>; #size-cells = <0>; status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dsi_in: endpoint { remote-endpoint = <&ltdc_ep0_out>; }; }; port@1 { reg = <1>; dsi_out: endpoint { remote-endpoint = <&adv7533_in>; }; }; }; }; &i2c2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c2_pins_a>; pinctrl-1 = <&i2c2_pins_sleep_a>; i2c-scl-rising-time-ns = <185>; i2c-scl-falling-time-ns = <20>; status = "okay"; /delete-property/dmas; /delete-property/dma-names; hdmi-transmitter@3d { co
Hello,I have a STM32MP2 platform with A/B partitioning for TF-A, metadata and FIP.I'm looking for a way to generate a test FIP and install it in FIP-B bank, have TF-A load it, if this FIP contains a bad signature or other error that will prevent Uboot or OPTEE containing this FIP from loading and launching, my platform reboots and TF-A reloads the functional FIP (FIP-A) and boots the platform correctly. the metadata.bin file generated by default in the TF-A recipe (meta-st-stm32mp) is installed in both partitions A and B, and both always load FIP-A!Thank you !
Dear,I'm starting with OP-TEE on STM32MP15x line. I bring-up the board as described here and built the optee_example_hello_world as described here. However, I got the error code below:TEEC_Opensession failed with code 0xffff0008 origin 0x3Checking the boot messages, I realized that the profile system_services is used. This way, it is not possible to run any TA. So, is there any already compiled image for STM32MP157C-DK2 board that allows running a TA or do I have to modify the image to enable it? Thanks!
Hello,I am trying to generate output with adjustable pulse width using One Pulse mode.The output pin is in a Pull-Up state, with an initial state of High. When One Pulse mode is activated, it outputs a Low signal for the specified duration.However, there is an issue.I expected the output to immediately drop to Low when the timer starts, but there is a delay of approximately 820ns before the One Pulse output is generated.Is there a solution to this?I am attaching my code.Thank you in advance.* Timer source Clock : 200MHz static void MX_TIM5_Init(void) { /* USER CODE BEGIN TIM5_Init 0 */ /* USER CODE END TIM5_Init 0 */ TIM_MasterConfigTypeDef sMasterConfig = {0}; TIM_OC_InitTypeDef sConfigOC = {0}; /* USER CODE BEGIN TIM5_Init 1 */ /* USER CODE END TIM5_Init 1 */ htim5.Instance = TIM5; htim5.Init.Prescaler = 1-1; htim5.Init.CounterMode = TIM_COUNTERMODE_UP; htim5.Init.Period = 1500-1; htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; htim5.Init.AutoRelo
Even if I route the differential pairs, one pair will always be longer than the other.Should I route an extra path, like a sawtooth or tromebone on the shortest pair to make booth differential pair equal in length?I see that the STM32MP1 dev-kit does not use this, either on DDR or Gigabit Ethernet, but I have heard that it's recommended to make sure that all differential pairs have the same length.HDMI:HDMI Gigabit Ethernet:Gigabit EthernetUSB OTG: USB OTG 1 USB OTG:USB OTG 2DQS1:DQS1DQS0:DQS0DDR CLK:DDR_CLK
I created a st-image-qt image using the STM32MP Distribution package and X-LINUX-QT add-on for the STM32MP157F-DK2 board.I could flash this image using the dd command in Linux and my target board is running correctly.On the other side, I created a qt quick app using qt 6.7.3(which I could test ok using qt creator) and now I need to add this qt app in my st-image-qt image. I can bitbake this custom recipe doing "bitbake mygui"I created the custom layer and a custom recipe and added this custom layer to my bblayers. Then, I built the image again with this custom recipe and it worked ok.The problem is that I'm expecting to find this qt app inside my bin directory, but I can't see it. SUMMARY = "This is the GUI for Hespect Software medical device" DESCRIPTION = "Recipe created by bitbake-layers" LICENSE = "CLOSED" SECTION = "Mysection" DEPENDS += " qtbase \ qtdeclarative-native \ qtdeclarative \ qtquick3d \ qtcharts" RDEPENDS_${PN} += "qtwayland" EXTRA_OECMAKE += "-DCMAKE_PREF
hi,I'm currently designing a custom board using the STM32MP157F MPU, and I'm referencing the schematic of the STM32MP157F-DK2 evaluation board. I'm stuck on identifying a specific component with a 0603 footprint. Is it a 0-ohm resistor? Additionally, what does 'ULO' mean at the end of the footprint? Lastly, what is the component labeled LNK2?
Hi,tI am trying to understand maximum PTP clock frequency. On page 5122 of the STM32MP2 the maximal frequency defined as 100MHz, but on page 1037 (RCC section) the maximal clock frequency of clk_eth1_ptp_ref is 200MHz. Which one is correct? Can I have 200MHz PTP timer clock? Another question, I am looking for a way to supply external clock for PTP timer, is there some way to do so? Thanks!Alexey.
Hi,I am working on STM32MP133FAFx . I have integrated PMIC and getting 1.35V voltage to DDR. I am using bare-metal environment without OSAlso configured required registers for DDR with below values for my hardware,DDR_MSTR 0x00040401DDR_MRCTRL0 0x00000010DDR_MRCTRL1 0x00000000DDR_DERATEEN 0x00000000DDR_DERATEINT 0x00800000DDR_PWRCTL 0x00000000DDR_PWRTMG 0x00400010DDR_HWLPCTL 0x00000000DDR_RFSHCTL0 0x00210000DDR_RFSHCTL3 0x00000000DDR_RFSHTMG 0x0075007DDDR_CRCPARCTL0 0x00000000DDR_DRAMTMG0 0x12182012DDR_DRAMTMG1 0x000A041ADDR_DRAMTMG2 0x0608090FDDR_DRAMTMG3 0x0050400CDDR_DRAMTMG4 0x08040508DDR_DRAMTMG5 0x05050403DDR_DRAMTMG6 0x02020002DDR_DRAMTMG7 0x00000202DDR_DRAMTMG8 0x00001005DDR_DRAMTMG14 0x000000A0DDR_ZQCTL0 0xC2000040DDR_DFITMG0 0x02060105DDR_DFITMG1 0x00000202DDR_DFILPCFG0 0x07000000DDR_DFIUPD0 0xC0400003DDR_DFIUPD1 0x00000000DDR_DFIUPD2 0x00000000DDR_DFIPHYMSTR 0x00000000DDR_ADDRMAP1 0x00080808DDR_ADDRMAP2 0x00000000DDR_ADDRMAP3 0x00000000DDR_ADDRMAP4 0x00001F1FDDR_A
please explain the steps on how to boot the image in sd card for stm32mp157d-dk1 and also which os should i need to use for programming
Hello I got succeed wlan0 connect to my phone just yesterdayPing 8.8.8.8 was worked and etc ok(without booting make 1m30s timeout)But today it is not working at all with just doing same beforeAfter enable and start wireless config with systemctl enable wpa_supplicant@wlan0.service systemctl restart systemd-networkd.servicesystemctl restart wpa_supplicant@wlan0.serviceOr wpa_supplicant -B -iwlan0 -c /etc/wpa_supplicant/wpa_supplicant.confThe error log is repeating on my console... What should i check? Thanks
I created a qt quick app onqt version 6.7.3 for the stm32mp157f-disco. I was able to test using qt creator and boot 2 qt on the target board and it worked just fine. Now, I'm in process of building the linux image for the target. Since I don't fully understand how to use yocto, and it seems there's no support from st side for qt on stm32mp15, I decided to go the other path, using the boot 2 qt. I created a custom recipe with my qt app and was able to bitbake this recipe. Now, I'm trying to build the entire image but I'm getting the following error: | cd /home/vboxuser/yocto/build-stm32mp15-disco/tmp/work/cortexa7t2hf-neon-vfpv4-poky-linux-gnueabi/qtwebengine/6.7.3/build/src/core && /home/vboxuser/yocto/build-stm32mp15-disco/tmp/work/cortexa7t2hf-neon-vfpv4-poky-linux-gnueabi/qtwebengine/6.7.3/recipe-sysroot-native/usr/bin/ninja -C /home/vboxuser/yocto/build-stm32mp15-disco/tmp/work/cortexa7t2hf-neon-vfpv4-poky-linux-gnueabi/qtwebengine/6.7.3/build/src/
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