STM32 MPUs

We are pleased to announce that version 6.18.0 of STM32CubeMX is now available. What is new in 6.18.0:  Added support for new microcontrollers in the STM32U3 series with 256 Kbytes and 512 Kbytes flash memory.  Added support for new microcontrollers in the STM32H5 series with 1 Mbyte flash memory.  Added support for new boards: NUCLEO-U345RC-Q, NUCLEO-U366RE-Q, STM32U366E-DK and            NUCLEO-H553ZG.  Added Start From Board feature for NUCLEO-U345RC-Q,  NUCLEO-U366REQ, NUCLEO-H553ZG,           NUCLEO-F446RE, NUCLEO-L432KC, and NUCLEO-L476RG.  Released the following new features:  Added support for PLAY for STM32H5 devices with 1 Mbyte of flash memory.  Add support for the MP25-DK board in the M33-TD flavor  Renamed all STM32CubeMX installers.  Added DMA comparison to the "Compare projects" feature.  Removed the JxBrowser dependency.  Upgraded the OpenSTLinux version to OpenSTLinux (OSTL) 6.2.1.  Main fixed issues in 6.18.0:   Refer to the STM32 microcontroller online documen

Hello Sir/Ma’am,I am planning to use two 8-bit DDR3L memory devices with the STM32MP257FAK3. Could you please confirm whether this configuration is compatible with the STM32MP257FAK3?If it is compatible, I would appreciate your guidance on how to implement this configuration. Regards,Shubham

Hi!I have a custom board with STM32MP257F. I have the same electrical setup for HDMI as STM32MP257-DK board have. Hence, the HDMI output is working. But playing sound through HDMI does not work very well. It sounds like the mono .wav files from /etc/share/sound/alsa are recorded under water.I play these sounds by using instructions from https://wiki.st.com/stm32mpu/wiki/How_to_play_audioHere is my sound card. I can play test sounds like pink noise, PWM and sine waves from speaker-test. Here is my hardware setup. I'm using the same HDMI and I2S Device Tree setup as STM32MP257-DK.(No, in mobile view, I cannot post this as a code block because the button "..." is not available)root@watermelon-wine-1aunknown:/usr/share/sounds/alsa# aplay -l**** List of PLAYBACK Hardware Devices ****card 0: STM32MP25DK [STM32MP25-DK], device 0: 400b0000.audio-controller-i2s-hifi i2s-hifi-0 [400b0000.audio-controller-i2s-hifi i2s-hifi-0]  Subdevices: 1/1  Subdevice #0: subdevice #0root@watermelon-wine-1aunkn

Hi,I am trying to use SPI3 from the Cortex-M33 on the STM32MP257F-EV1 running OpenSTLinux 6.6 (Scarthgap).Software versionsBoard: STM32MP257F-EV1 OpenSTLinux: 5.0.15 Kernel: 6.6.116 STM32Cube_FW_MP2_V1.3.0 M33 application based on OpenAMP_TTY_echo_CM33What I changedI modified the OP-TEE RIF configuration file: external-dt-v6.0-stm32mp-r3/stm32mp2/a35-td/optee/stm32mp257f-ev1-ca35tdcid-ostl-rif.dtsiI changed SPI3 ownership from CID1 to CID2: RIFPROT(STM32MP25_RIFSC_SPI3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_PRIV, RIF_CID2, RIF_SEM_DIS, RIF_CFEN)I also assigned the SPI3 GPIO pins to CID2:PB7 PB8 PB10using: RIFPROT(... RIF_CID2 ...)Then I rebuilt:OP-TEE FIPand flashed the new images while keeping the original TF-A.VerificationUsing a small RIF access test on the M33, I verified that SPI3 is now accessible.Before: RIF CRC=0 I2C1=0 UART5=0 SPI3=3After modifying the RIF configuration: RIF CRC=0 I2C1=0 UART5=0 SPI3=0So the peripheral owners

Hi,At my company, we develop debuggers and are trying to access STM32MP257F-EV1(ES) board via the DAP,Unfortunately, we are unable to access the DAP and it seems like JTAG (DAP) access is prohibited by hardware.The result was the same even after shorting JP3 and turning off ST-LINK.I have the following questions:Are there any other jumpers positions that have to be changed? Please let me know.Does STM32MP257F-EV1(ES) have debug authentication enabled by default?If so, please let me know if there are any technical documents that explain the procedure for debug authentication.I tried to connect to the on-board debugger by running STM32CubeProgrammer and choosing ST-LINK (SWD), but access was denied.The boot mode that I tried were "UART/USB" and "Development", but both showed the following error:Error: No STM32 target found! If your product embeds Debug Authentication, please perform a discovery using Debug AuthenticationPlease let me know if there is a document or URL that explains how S

Hello,We are designing a custom board using the STM32MP157FAC1 device. For programming and debugging, we are planning to provide an STDC14 connector on our board and use the STLINK-V3SET debugger/programmer.We have the following queries:(1.) Is the STLINK-V3SET suitable for programming and debugging the STM32MP157FAC1 device?(2.) We have connected T_VCP_TX (Virtual COM Port transmit signal) to PG11, which can be configured as UART4_TX, and T_VCP_RX (Virtual COM Port receive signal) to PB2, which can be configured as UART4_RX on the STM32MP157. Kindly confirm whether this connection scheme is correct.(3.) The SWD and Virtual COM UART signals are connected directly from the STDC14 connector to the STM32MP157FAC1 device. Is any ESD protection recommended on these signals? If yes, kindly share the relevant reference.Regards,Prashant Sharma

Hello,I am using a STM32MP257 (Karo SOM), RGMII connected to a DP83869 (100Mbps fiber mode).This is working well until I start the LVDS screen on my board.The screen is powered with 2 regulators :  Backlight (16V/360mA, dedicated boost) Logic (2.7V/500mA, dedicated buck)The DP83869 is powered with 3 regulators :1.1V (dedicated buck) 2.5V (dedicated LDO) 3.3V (shared buck also powering the MP2 SOM)Below is the behavior in different configurations:Screen unplugged => fiber link OK Screen plugged => fiber link KO hot-unplugging the screen makes the link working instantly Screen unplugged, flat cable present, with 100ohm R at the end of the LVDS signals => OK Screen unplugged,  With no current on the BL / logic DC/DC converter => OK Sinking 300mA on the BL => KO Removing the sink current makes the link working instantly Sinking 300mA on the logic => KO Removing the sink current makes the link working instantly Probing power rails with a scope show clean signals,

Hi everyone,I am new to Android development, and I have two questions about OpenSTDroid v6.2.0.I followed the official documentation to build OpenSTDroid, but I encountered a build error. The details are shown in the attached error.txt.How to build OpenSTDroid distribution - stm32mpu   For OpenSTDroid, is the Device Tree workflow similar to Yocto? In other words, should the Device Tree be generated by STM32CubeMX and then integrated into the OpenSTDroid source tree?Any guidance or suggestions would be greatly appreciated.Thank you.

I have an STM32mp135f-dk board that I have been using openstlinux-6.1 to develop images on.For my board, I made a custom device tree "iris.dtb" which I intend to use instead of the default "stm32mp135f-dk.dtb".I ran into an interesting issue where u-boot on my board would not load the my modified uboot environment variables.For context, the following is my flash layout file with the u-boot-env at address 0x00904400  #Opt Id Name Type IP Offset Binary - 0x01 fsbl-boot Binary none 0x0 arm-trusted-firmware/tf-a-stm32mp135f-dk-usb.stm32 - 0x03 fip-boot FIP none 0x0 fip/fip-stm32mp135f-dk-optee.bin P 0x04 fsbl1 Binary mmc0 0x00004400 arm-trusted-firmware/tf-a-stm32mp135f-dk-sdcard.stm32 P 0x05 fsbl2 Binary mmc0 0x00044400 arm-trusted-firmware/tf-a-stm32mp135f-dk-sdcard.stm32 P 0x06 metadata1 FWU_MDATA mmc0 0x00084400 arm-trusted-firmware/metadata.bin P 0x07 metadata2 FWU_MDATA mmc0 0x000C4400 arm-trusted-firmware/metadata.bin P 0x08 fip-a FIP mmc0 0x00104400 fip/fip-stm32mp135f-dk

I was able to sign properly a tf-a image using STM32_SigningTool_CLI STM32_SigningTool_CLI -bin tf-a.stm32 -o tf-a_Signed.stm32 --password password --public-key publicKey00.pem publicKey01.pem publicKey02.pem publicKey03.pem publicKey04.pem publicKey05.pem publicKey06.pem publicKey07.pem --private-key privateKey00.pem --type fsbl --header-version 2.2 -of 0x00000001 I was moving my setup to use a pkcs#11 to better manage my secrets. I was trying to use softhsmv2 as a first step. It seems that if -hv is specified the tool is failing while validating the inputs:STM32_SigningTool_CLI -bin tf-a.stm32 -o tf-a_Signed.stm32 --password password --header-version 2.2 -of 0x00000001 --module /usr/lib/softhsm/libsofthsm2.so -ki 00 01 02 03 04 05 06 07 -pwd password -si 0x00 -aki 0x00 --header-version 2.2This produces the error:Error: Invalid Header version valueHeader v2.2 accepts 8 public keys And if I don't define --header-version the tool works properly, but the output i

Hi! We are using the STM32MP153 with FreeRTOS on the CoPro side and OpenEmbedded/Yocto Linux on A7 side. To save power, the CStop mode is used. We go to CStop using`HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI);`on the CoPro side and using`echo deep > /sys/power/mem_sleepsystemctl suspend`on Linux side.The CoPro is waken up by a falling edge on pin PI8 via an EXTI interrupt.The Linux also wakes up using a falling edge on pin PI8 (modified device tree).Sometimes (approx. every 10 wakeups, but I can’t reliably tell), a Hard Fault occurs on the CoPro shortly after waking up. I noticed that, when that happens, the memory area 0x10040000 through (at least) 0x10042a80 is overwritten with 0xFF. This is where the IPC shared memory is, which leads to an invalid load operation, causing the Hard Fault. Also, on Linux side, a message occurs `[  272.028406] virtio_rpmsg_bus virtio0: output:id 4294967295 out of range`.Sometimes, the memory area of approx. 0x1003D000 through 0x100

Hi!I wonder why ST have chosen to implement a 10 kOhm pull-up (R34) on the clock line of the SD-card?I have seen this on the STM32MP257F-DK board from ST.Normally, you chould not have a 10 kOhm pull-up on the clock signal, only the other data/command signals.That’s the reason why the EMI filters for the SD-card e.g ST products EMIF06-HMC02F2 and EMIF06-MSD02N16 does not any pull-up onto the clock signal. 

Hi!I think there is some display issues with STM32CubeMX with the cr_ker_ltdc If I look in the clock summary, I csn see that the ck_ker_ltdc is set to 100 MHz."ck_flexgen_27 0 0 0 100000000 0 0 0 Y deviceless no_connection_id             ck_ker_ltdc 0 0 0 100000000 0 0 50000 N 48010000.display-controller lcd                                                                                                                                    48000000.dsi px_clk                                                                                                                                 deviceless no_connection_id                clk_pix_ltdc 0 0 0 100000000 0 0 50000 Y 48010000.display-controller ref                                                                                                                                       deviceless no_connection_id         "In this case, I need to increase the cr_pix_ltdc to above 148.5 MHz to achieve full HD at the HDMI output.But in the CubeMX,

Hello,while testing 6 types of SPI NAND with MP257, I found no 1V8 part boots (tested 2, MT29F4G01ABB and AS5F18G04SND). While looking at scope traces, 32MHz clock from BootROM is almost sinusoidal.I tested booting from Engineering mode and custom BL, it boots Linux as 21MHz but not at 32MHz. IOSPEED is set to “2” (tested 3 too).Then I set bit 14 in OTP 124 (allow for <2.5V for VDDIO3) and then set PWR->CR1 VDDIO3VRSEL too. Now, it boots with 32MHz from my BL (with IOSPEED 2) and clock now seems much nicer.But BootROM seems to ignore OTP 124 and tries to use 32MHz with 1V8 and GPIO in degraded mode.Is there way to make 1V8 OSPI boot work ? Force ROM to either use slower clock or to set VDDIO3VRSEL.Thanks, Martin

Hello everyone,We’ve been dealing with a puzzling power management issue on our board (battery-powered design). The PMIC (STPMIC1) intermittently enters an unresponsive state that we believe matches the state described in AN5861. We’ve already implemented the supervisory circuit, but in this case it doesn’t have the desired effect. We're about to enter production, and this issue is our final blocker. We’d appreciate any pointers on how to resolve it. Part number STPMIC1BPQR with the AN5861 supervisory circuit fitted EnvironmentSTM32MP151AAB3 The device is battery-powered; the battery is non-removable. The product is charged via a wireless charger (STWBC86). Schematics Please see parts of our schematics attached. DetailsThe unit appears to experience a brown-out/battery protection event. It seems to happen at very low battery levels. The unit sometimes does not respond to the power button afterwards, which essentially means the device is bricked. Putting the device on the charger does n

I have an EtherCAT project that uses the open-source software EtherCAT master station IGH.Currently, my platform is the main controller STM32MP257, and the relative jitter of IGH--enable-generic is relatively large.I would like to inquire if ST has provided corresponding real-time network card driver patches for the EtherCAT master station IGH?If there are any other better solutions, please let me know. Thank you~

Hello I am planning to use STM32mp257Fak3 with DDR3L (16bit and 32 bit saperately),can you suggest some DDR part no and it's sonnection.

Hello,We are designing a custom board using the STM32MP157FAC1 device and need to provide provision for a Serial NOR Flash connected to the QUADSPI interface.We are planning to use Winbond's device W25Q256JVFIQ for this purpose. Kindly confirm whether this device is suitable for use with the STM32MP157FAC1 or if there is any recommended QSPI NOR Flash device that should be preferred with this microprocessor.Regards,Prashant

Hi!My Linux is booting on my custom board. This board is using 2 GB (16-bit density) instead of 4 GB (32-bit density).So, when Linux is booted. I get this.Can it be so CubeMX is only fixed to 4GB when selecting STM32MP257F? Any suggestions? The complete log is attached.I'm using USART6 as debugging tool. flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' Sending event 6/(unknown) to spy 'efi_disk del' eth1_clk_mx-0: When removing: flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' eth1_mdio_mx-0: When removing: flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' eth1_rgmii_mx-0: When removing: flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' sdmmc1_mx-0: When removing: flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' usart6_mx-0: When removing: flags=600, drv->flags=0, err=-129 pinctrl@44240000: When re

Hello, I am preparing to develop a custom board based on the STM32MP15 series MPU and getting accustomed to the DDR testing procedures in the STM32Cube ecosystem with an STM32MP157F-DK2 evaluation board. However, I am running into issues with the SYSRAM loading option which seems to be the necessary method for DDR testing new, custom boards designed around the STM32MP157 MPU. Firstly, I am able to run the DDR Test Suite in STM32CubeIDE or STM32CubeMX after importing the STM32DDRFW-UTIL-main\DDR_Tool\STM32MP157C-DK2 project into STM32CubeIDE. I am able to run the test firmware on the evaluation board with the "Debug As" option (with boot switches set to Engineering Mode), and then I am able go to a new .ioc project file made for the STM32MP157F-DK2 (peripherals initialized in their default modes) and use the DDR Test Suite via the "DDR Interactive" mode with no issues. Similarly, I can open a serial connection in TeraTerm via the ST-LINK COM port and run the DDR tests the

HI How are you!I am using the SAI interface on the STM32MP257F-DK to connect directly to an external ADC and acquire data in frame mode. I have assigned SAI3 to the M33 domain and run the firmware under FreeRTOS. Despite following all resource isolation configurations specified in the reference manual and conducting a full week of detailed debugging and security settings, launching the M33 firmware remotely from the A35 Linux domain always results in an IAC error. Is it not possible to assign the SAI peripheral to the M33 core?  thanks !

CM33 FIRMWARE SIGNING KEY MISMATCH---We have successfully flashed OpenSTLinux v26.02.18 with the full optee layout and confirmed:- remoteproc0 fw_format = TEE- The pre-built example firmware (USBPD_DRP_UCSI_CM33_NonSecure_sign.bin) loads and runs correctly- STM32CubeIDE debugger successfully attaches to the running CM33However, when we sign our own CM33 firmware using sign_rproc_fw.py, OP-TEE rejects it:   tee_remoteproc: TA_RPROC_FW_CMD_LOAD_FW invoke failed TEE err: ffff0006   remoteproc remoteproc0: Boot failed: -5Error 0xffff0006 = TEE_ERROR_SECURITY (signature verification failure)Signing command used:   python3 sign_rproc_fw.py --in CM33_LED_CM33_NonSecure.elf --out CM33_LED_sign.bin --key default.pemKeys tried (all have identical MD5: c5254a254e63da936a640d0a0093bcf0):- STM32CubeMP2-1.3.0/Utilities/optee_os/keys/default.pem- sdk/sysroots/cortexa35-ostl-linux/usr/include/optee/export-user_ta_arm64/keys/default.pem- sdk/sysroots/cortexa35-ostl-linux/usr/include/optee/export-user_t

Dear ST Support Team,Thank you for your continued support. We are working with the STM32MP257F-EV1 evaluation board and have two issues we need help resolving.Hardware: STM32MP257F-EV1 Evaluation Board (MB1936D)Software Package: OpenSTLinux v26.02.18 (stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18)Host OS: Ubuntu 26.04STM32CubeIDE: v2.1.1STM32CubeProgrammer: v2.22.0Flash Layout Used: FlashLayout_sdcard_stm32mp257f-ev1-ca35tdcid-ostl-m33-examples-optee.tsv---ISSUE 1: ETHERNET PORT (end0 / ETH1) NOT WORKING---The Ethernet interface end0 shows NO-CARRIER even when a cable is physically connected.Observations:- ip link show end0 → state DOWN, NO-CARRIER- cat /sys/class/net/end0/carrier → 0- ethtool end0 | grep 'Link detected' → Link detected: no- udhcpc -i end0 → broadcasts DHCP but gets no response- The Ethernet driver loads correctly: stm32-dwmac 482d0000.eth2 end0- We have tried ETH1 and ETH2 ports on the board- We have tried different cables and different router ports- The boar

I’m reading the getting started manual of STM32MP257 (AN5489) and it displays that there are internal pull-ups on CMD and D0, but not CK.Also there is a confusion if the dashed lines means they have internal pull-ups as well.My question is:If CMD, D0, D1, D2 and D3 have internal pull-ups. Why does the STM32MP257F-DK board have external pull-ups?Can I skip these external pull-ups? According to the datasheet of STM32MP257C/F (DS14284 - Rev 5), the CK, CMD and D0 MUST be high at initialisation of the BootROM.  

Hello ST Team,I am evaluating the STM32MP215F-DK with the recommended M.2 Wi-Fi/BT module (Embedded Artists EAR00409 / Murata 2EL). I have encountered two critical issues that prevent the Wi-Fi features from working out-of-the-box with the standard Starter Package.I believe these are bugs in the current hardware/software release.1. Critical Software Configuration Issue: SDMMC2 Access Blocked by RIFThe STM32MP215F-DK Data Brief explicitly states that the board features an "M.2 E-Key connector to support Wi-Fi® and Bluetooth® SDIO modules". However, with the default Starter Package (OpenSTLinux 6.6), the Linux kernel fails to probe the Wi-Fi module on SDMMC2.Symptoms:• Linux kernel log shows no response from mmc1 (SDMMC2).• Attempting to access the SDMMC2 registers manually via devmem 0x48230000 results in a Bus Error.• OP-TEE console reports a firewall exception: SERC exception ID: 77 (SDMMC2 Illegal Access).Root Cause Analysis: It appears that the Trusted Firmware-A (TF-A) device tree