STM32 MCUs

Hello, I wanna use the development board STM32N6570-DK for taking a picture with MB1854B. i am quite new for DCMI and DCMIPP. i just want to read the image through the pipe1 of dcmipp but i dont know how to config the MCU in .ioc file. Can anyone explain or give me an example for that? 

Hello, I've been trying to setup bi-directional communication with USB-HID on a custom board with STM32WB55CEU. I can send data to the PC from the STM just fine. My usb stack runs, enumerates and reports correctly. However, when trying to send Data from the PC back to the STM, I always receive garbage packages. Here's my device descriptor for the Outreport: 0x09, 0x03, // USAGE (Vendor Usage 3) 0x75, 0x08, // REPORT_SIZE (8) 0x95, 0x04, // REPORT_COUNT (4) 0x91, 0x02, // OUTPUT (Data,Var,Abs)So 4 Bytes. I also tried this with and without adding a Report ID, which did not change the results whatsoever.I have also tried running the code with defining USB_CUSTOMHID_REPORT_BUFFER_EVENT_ENABLED; both in main.h and in usbd_customhid.c and usbd_customhid.h to no changes.I also tried changing CUSTOM_HID_EPOUT_SIZE to 0x04 and 0x05, same with USBD_CUSTOMHID_OUTREPORT_BUF_SIZE. Including all of the combinations with and without report ID and with and without enabling the buffer define.

Hi all,I am designing a custom PCB using the STM32N657Z0 and am looking for some advice on how to treat some of the specialized pins that I don't plan on using. Specifically I have not been able to find any recommendations on how to treat any of the CSI pins if they are not in use. The closest I've found was https://community.st.com/t5/stm32-mcus-products/stm32n6-minimal-hardware-design/td-p/794094 which did inform me on what to do with my unused USB OTG pins for the most part. Would it be acceptable to ground all these pins with a shared external pull-down? This is what AN5967 would lead me to believe but I wasn't sure if these pins were grouped in with what was described in section 12.7. Appreciate any help, thanks!

I'm trying to read ADC1 on channel 12 using ADC with DMA in a Zephyr OS environment, but I'm getting a BUS FAULT error when using the adc_read_async()  API. This is my prj.conf file CONFIG_LOG=y CONFIG_MAIN_STACK_SIZE=4096 CONFIG_ADC=y CONFIG_ADC_ASYNC=y CONFIG_DMA=y CONFIG_ADC_STM32_DMA=y CONFIG_DMA_STM32=y CONFIG_DMA_STM32U5=n CONFIG_ARM_MPU=n CONFIG_DCACHE=n CONFIG_NO_OPTIMIZATIONS=y CONFIG_CACHE_MANAGEMENT=y CONFIG_NOCACHE_MEMORY=y CONFIG_FAULT_DUMP=2 CONFIG_LOG_MODE_IMMEDIATE=y CONFIG_ISR_STACK_SIZE=2048 CONFIG_ADC_LOG_LEVEL_DBG=y CONFIG_DMA_LOG_LEVEL_DBG=y  Overlay / { zephyr,user { io-channels = <&adc1 0>; }; aliases { adc1 = &adc1; }; }; &dma1 { status = "okay"; }; &dma2 { status = "okay"; }; &dmamux1 { status = "okay"; }; &adc1 { status = "okay"; compatible = "st,stm32-adc"; st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; // pinctrl-0 = <&adc1_in12_pc0>; // pinctrl-names = "default";

It is well-known that when configuring and starting a timer using HAL_TIM_Base_Init and HAL_TIM_Base_Start_IT, the interrupt and callback are triggered immediately. This is because configuring the reload-register & prescaler requires generating an update event (using EGR_UG) which then sets the interrupt flag.The function TIM_Base_SetConfig even contains an attempt to solve this by manually clearing the UIF flag./* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); }However, this does not usually work, probably because the timer runs a little slower than the CPU, and the APB bus also needs a few cycles to transfer the access to EGR. Compiling without optimizatio

In STM32Cube_FW_H7RS_V1.3.0, file Projects\STM32H7S78-DK\Applications\ROT\OEMiROT_Boot\Inc\stm32_extmem_conf.h:The configuration for the external RAM (presumably for an APS256XXN-OBR-BG, since that's what on the DK) is incorrect. In particular, it doesn't set the latency values to be able to run at 200 MHz.(I think that the dummy cycle values may also be wrong - but I suspect they're ignored anyway.)Here's my code (I also changed the drive strength, but that may not be necessary). Without these changes, the RAM could be read, but not written: .PsramObject = { .psram_public = { .MemorySize = HAL_XSPI_SIZE_256MB, /* memory size is 256Mbit */ .FreqMax = 200000000u, /* 200Mhz */ .NumberOfConfig = 3, /* Config */ { #define EXTRAM_MR0_READ_LATENCY_MASK (0x7 << 2) #define EXTRAM_MR0_DRIVE_STRENGTH_HALF (0x1 << 0) #define EXTRAM_MR0_READ_LATENCY_200_MHz (0x4 << 2) #define EXTRAM_MR0_DRIVE_STRENGTH_MASK (0x3 << 0) #define EXTRAM_MR4_WRITE_LATENCY_MASK (0

Split from this post. Thank you for your help, I didn't know this mode and it works well. I did a measure every 5s. I use Timer1 for injected mode and timer3 for DMA mode. I've just a little difference of measure. With the ADC, I have the following value : 944, that's to say (with ratio = 4), ((944 * 3.3) / 4096) = 0.7605 * 4 = 3.04V. My sampling is 480cycles.(if I put only 3 cyles, the measure is lower (2.88V)). Or with my multimeter, I have 3.20V.

Hello everyone, I am working with the STM32H743BIT6 using the LTDC peripheral to drive an RGB display. The display I am using does not have HSYNC and VSYNC signals and operates only in DE (Data Enable) mode. I have attached the display datasheet for reference. Based on the datasheet timing specifications, I configured the LTDC parameters accordingly. Since the display does not use HSYNC and VSYNC, I configured them as constant high signals (logic 1) and set the rest of the LTDC timing parameters as specified. However, the display is not showing any image. The backlight turns on, but the screen remains black. Below are the key points of my configuration: LTDC peripheral configured according to the display timing parameters from the datasheet HSYNC and VSYNC set to constant logic high since the panel works only in DE mode Pixel clock configured as per the display requirements Data Enable (DE) signal connected and active RGB data lines connected correctly Framebuffer configured in SDRAM

Hello, Based on my understanding, in this code /* Run inference by executing epoch blocks until done */ LL_ATON_RT_RetValues_t result; uint32_t total_run_ticks = 0u; uint32_t total_wfe_ticks = 0u; do { uint32_t run_start = tim2_get_count(); result = LL_ATON_RT_RunEpochBlock(&NN_Instance_audio_network); uint32_t run_end = tim2_get_count(); total_run_ticks += (uint32_t)(run_end - run_start); if (result == LL_ATON_RT_WFE) { uint32_t wfe_start = tim2_get_count(); LL_ATON_OSAL_WFE(); uint32_t wfe_end = tim2_get_count(); total_wfe_ticks += (uint32_t)(wfe_end - wfe_start); } } while (result != LL_ATON_RT_DONE); uint32_t npu_end = tim2_get_count(); uint32_t total_us = tim2_ticks_to_us((uint32_t)(npu_end - npu_start)); uint32_t run_us = tim2_ticks_to_us(total_run_ticks); uint32_t wfe_us = tim2_ticks_to_us(total_wfe_ticks); LOGI_I32("NPU inference (us): ", (unsigned long)total_us); LOGI("NPU epoch time (us): run=%u wfe=%u", run_us, wfe_us); calling LL_ATON_OSAL_WFE

Hi everyoneI've got a few questions about the views that show FreeRTOS Semaphores and Queues:1.  My application creates a lot of Mutex and Queues, and only the first 63 (or 64 -- I may have lost count) of each type are visible.  Is this a feature or a bug?  And if I want to see the remainder... any thoughts on how to go about that?2.  Here's a screenshot of the Semaphore view:2A:  MutexSPI2 is created by CubeMX as a dynamically allocated Mutex using the CMSIS OS wrapper.2B:  PS-Global Lock is created with mutex_init(&lock,"PS-Global Lock");whereint mutex_init(mutex_t *_m, const char* mutex_name) { SemaphoreHandle_t *m = (SemaphoreHandle_t *) _m; *m = xSemaphoreCreateMutex(); vQueueAddToRegistry((QueueHandle_t) m,mutex_name); return 0; }I'm guessing that since the 'mutex' is being defined as a Semaphore is why it's not showing up on the list as a MUTEX, but I don't understand why the "Size" and "Free" values are.2C: The remainder of the Semapho

Dear community,I'm developing the STSPIN32G4. My setup is as follows:12V for the V_MExternal 3.3V for VDD / VDDA / VREF+ / VBAT / VREGINPB8 (BOOT0) with 10K pull-downnRESET with RC-delay circuit: 10K pull-up to 3.3V + 10uF capacitorPower sequence: 12V is applied first to the STSPIN32G4 and L6982N33DR, then L6982N33DR supplies 3.3V to VDDThe problem I'm facing right now is:The MCU starts working (sending UART and running the peripheral devices), but the gate control parts (GHSx & GLSx) remain idle and don’t drive current.I have to manually pull nRESET low again to start the gate control.How can I solve this? I want the chip to automatically start the gate driver at power-up.I also noticed that the EVSPIN32G4 evaluation board shows the same behavior.

Hello, I am currently working with the STM32G030C8TX microcontroller and I have encountered an issue while reading analog values through the ADC. When I attempt to read ADC values from the PB11 and PB12 pins, the measured values are incorrect or unstable. However, when I use other ADC-capable pins on the same microcontroller, the readings appear to be correct and stable. Because of this behavior, I am unsure whether: PB11 and PB12 pins support ADC functionality on this device/package There is a configuration issue on my side Or there might be a silicon/production-related issue with the chip I would appreciate it if you could clarify whether these pins are valid ADC inputs on the STM32G030C8TX and if there are any known limitations or special configurations required.

Hi team,  We have our own customized USBPD board (STM32L562CET6) which support both SPR(100W) and EPR(140W). SPR is working great, now we want to work on 140W using EPR mode. So that initially we have tried to enter EPR mode by following method #define USBPD_EPRMDO_ACTION_ENTER (uint32_t)(0x01 << 24)#define USBPD_EPRMDO_DATA_ENTER (uint32_t)(0x8C << 16)eprmdo[0] = 1; //Header - no.of data objectseprmdo[1] = USBPD_EPRMDO_ACTION_ENTER | USBPD_EPRMDO_DATA_ENTER;//EPRMDOstatus = USBPD_PE_Request_DataMessage(0, USBPD_DATAMSG_EPR_MODE, eprmdo); But it returns "USBPD_FAIL". Please clarify me that "Is it possible to enter EPR mode by using above mentioned method? If yes, please correct me why i am getting USBPD_FAIL status." 

[PN]: STSPIN32G4[VERSION]: v6.4.1[TOOL]: MC Workbench / Motor Pilot[DETAILS]:I am working with a custom PCB design which was largely follows the EVSPIN32G4 schematic. I defined a custom board in MC Workbench and generated firmware, and can upload the firmware to the STSPIN without issue. Motor Pilot detects the board, and I can command START/STOP and read values/status.When I press START for either Torque or Speed control, the board enters some ALIGNMENT stage (only the first time) followed by RUN. No behavior is observed with the motor. No faults are ever reported by Motor Pilot. I can STOP and START motor control again and still see no change in behavior.With a scope, after START I see a single pulse on the U phase's gate for around 22 microseconds, then it falls to 0V and remains there. I did briefly run the firmware under GDB, and I see that MOE is set during RUN.Using a 48V frameless motor, running from a Li-Ion pack (bus voltage currently 56V), SIR680LDP-T1-RE3 FETs. VCC mea

I have an application that uses the OCTOSPI1 interface to read from and write to an external NOR flash memory into an SRAM1 buffer. The read and write operations are performed in the NS section of the application. If I perform a transfer without using DMA, it works. However, if I try to use GPDMA1, I get a buffer with all data set to 0, with no error.Additional information: the application works very well with GPDMA1 if I disable the MCU’s TrustZone mode.I conclude that GPDMA is not fully initialized to work with TrustZone enabled, but I can’t figure out what’s missing despite my searches on this forum.Any help would be greatly appreciated.

I'm confused by ST's seeming definition of what they think a QUAD word is....according to most of the planet a WORD is 16-bits, so a QUAD word is 64-Bits.  However according to ST a quad word is 128 bits on the STM32U535.I enclose a section of my code - essentially I want to write 11520 values which are U32's and then read them again when I power it back up, bit its getting confused because I can't get my head around whether there's 64, or 128 bits in a QUAD WORD! xnLookup[][][] is the Parameter I want to write, and the read back which is a U32This is the WRITE: i=0;//Channel 0..3 j=0;//Temperature 0..180 (-50 to +130DegC) k=0;//Term X0, X1, X2, X3 etc n=1;//Counter for every 4th flash word MemCount=0;//Total memory locations //was 11520 for -50 to +130DegC. change to for(m=0;m<11520;m++)//Total number of parameters to write - //12160 { //Copy the polynomial term into the flash array flashdata32[n-1].l=xnlookup[k][i][j].l;//Put the polynomial term onto the fla

I am using an STM32 Nucleo-F767ZI with RMII Ethernet + LAN8742A PHY and an example project based on lwIP/TCP-IP. I noticed a strange behavior: if I comment out MX_USB_OTG_FS_PCD_Init(), Ethernet communication stops working. If I keep it enabled, Ethernet works correctly. The peripheral initialization order is: MX_GPIO_Init(); MX_USART3_UART_Init(); MX_LWIP_Init(); MX_TIM3_Init(); MX_SPI4_Init(); MX_CAN1_Init(); MX_UART5_Init(); MX_USB_OTG_FS_PCD_Init(); Additional observations: SystemClock_Config() does not change Replacing MX_USB_OTG_FS_PCD_Init() with HAL_Delay() does not fix it So it does not look like a timing issue It seems that HAL_PCD_Init() / HAL_PCD_MspInit() for USB is enabling or configuring something indirectly that Ethernet depends on My question is: What could USB FS initialization be configuring that would make Ethernet work, even though they should be unrelated? I am thinking about possibilities such as: GPIO clocks being enabled indirectly MSP/NVIC config

Is there a detailed user manual available for the NUCLEO-U3C5ZI-Q?The product page links to a generic getting started document and a generic document on Nucleo 144 boards, but I can't see anything that lists the I/O or that documents the links.

Hello,i tried to generate for STM32f429i disco a project with graphic = touchgfx.1) i generate cubemx (for STM32f429i disco) project for SW4STM32 toolchain2) i generate a simple touchgfx project for SW4STM32 toolchainBut compilation under eclipse gives the following errors :HALSDL2.hpp:22:10: fatal error: SDL2/SDL_video.h: No such file or directoryHALSDL2.hpp:22:10: fatal error:SDL2/SDL_render.h: No such file or directorymain.cpp:30:10: fatal error: shellapi.h: No such file or directoryI can i solve these compilation errors ?thanksbest regards

I am planning to do an aging test which need capture the voltage of a net, but i found STM32U585OIY6QTR report a value about 40 while the actual voltage of ADC channel is close to VREF.Then i write a simple ADC demo to verify ADC configuration, and run my code on B-U585I-IOT02A board(based on STM32U585AII6Q), it report a correct value, but the same code report a wrong value on my board.I use ADC1  CHANNEL2(GPIOC GPIO_PIN_1) on both board.The only difference between B-U585I-IOT02A and my hardware is the different VREF i think(B-U585I-IOT02A use 3.3V, but my board use 2.5V).Is there any difference on ADC usage between STM32U585AII6Q and STM32U585OIY6QTR?You can find my ioc file and code in attachment, can anyone help me check my configuration? 

I am trying to develop a small scale lorawan app on a nucleo-wl55jc using the application example in stm32cube_fw_wl_v1.5.0 and have spent several hours trying to trace my error/bug in the software. All join attempts fail because the deveui as it appears in the se-identity.h file is ignored and the mcu derived value applied. Tracing this value to the lora_app.c file shows the se-identity.h file is correctly read and the macro expansion appears to give the correct value in the set user credentials section (lines 617-620) but the join is attempted using what I believe to be the mcu derived value. The same credentials work as expected when used under stm32cude_fw_wl_1.4.0 At the outset, I must confess it's 25 years since I did any serious programming so I may of missed something obvious but I would be grateful for any pointers as to why it's failing!  

  I have already set the MTU to 3000 on the PC side. On the STM32H743 side, I have set the RXBUFFLEN, MTU, PBUF_POOL_SIZE, and other related memory configurations to 3000. I have configured and enabled Jumbo Frame and disable Jabber disable and Watchdog disable with ETH->MACCR |= (ETH_MACCR_JE | ETH_MACCR_WD | ETH_MACCR_JD | ETH_MACCR_GPSLCE);However, when I ping the STM32 from the PC with 1472 bytes, it is successful, but pings larger than 1472 bytes fail. Why is this happening? What have I not configured correctly?  

Hello,After spending several days investigating this topic and reviewing all the documentation I could find, I am still completely stuck on how to proceed with implementing STiROT + OEMuROT on my STM32H7S3.An important point is that I am trying to add this security architecture to a project that is already at a fairly advanced stage of development. The project was originally built on top of the XIP template provided by ST:https://github.com/STMicroelectronics/STM32CubeH7RS/tree/main/Projects/NUCLEO-H7S3L8/Templates/Template_XIP The difficulty comes from the fact that, in the XIP context, the project only includes these layers:AppliBootExtMemLoaderAs a first step, I imported ROT_Provisioning into the project in a separate folder. However, I still do not see how I should properly integrate or adapt the following components into my current project structure:OEMiROT_AppliOEMiROT_BootSTiROT_AppliSTiROT_BootShould I try to merge the `*_Appli` projects into my existing Appli context, and

  Hello, I am working on STM32 NUCLEO-G431RB using STM32CubeIDE and FreeRTOS (CMSIS-RTOS v2). I am trying to implement the following requirement: Requirement ADC1 → 1 Channel using Interrupt ADC2 → 7 Channels using DMA Both should run simultaneously with FreeRTOS ADC Configuration ADC1 (Interrupt) Single channel (PA0) Using HAL_ADC_Start_IT() Used for detecting external voltage Expected Behavior: When I connect external power supply to PA0 PA0 should show voltage value Remaining 7 channels should show 0 Example:     PA0 = 2.5V (Interrupt)PA1 = 0PA6 = 0PA7 = 0PC0 = 0PC1 = 0PC2 = 0PC3 = 0       ADC2 (DMA) 7 Channels: PA1 PA6 PA7 PC0 PC1 PC2 PC3 Configuration: Scan conversion enabled Continuous conversion enabled DMA circular mode Using HAL_ADC_Start_DMA() Expected Behavior: If I connect external voltage to PA1     PA0 = 0PA1 = 2.5V (DMA)PA6 = 0PA7 = 0PC0 = 0PC1 = 0PC2 = 0PC3 = 0   &nb

Hi ST Team,I'm creating project in the motor control workbench,I had selected hardwars are1. STM32G4EVAL1 Board2. Motor Drive3. Motor once i selected in the tool as shown in below.in this connector are not available to connect to the main board to motor drive.need to import the .Json file but in portal there is .Json file.This connector (X-NUCLEO-IHM09M2) is needed to use .Could you please help me on this connector how to download from st website.