STM32 MCUs

Hello, I expect this to be flagged before but couldnt find during search. Is Table 116 for the stm32f43xx on page 768 missing registers for CRYP_K2LR / CRYP_K2RR at offset 0x30? TIA

Hello,I am working on a custom board based on the STM32H747 to develop a Touchgfx application as User Interface, where I am using the same QSPI Flash device as the STM32H747I-EVAL kit (MT25TL01G 1Gbit), but with a different chip-select pin wiring.On the STM32H747I-EVAL board, the external loader (MT25TL01G_STM32H747I-EVAL.stldr) is configured to use:QSPI_BK1_NCS (PG6) as the common chip-select for both banks.On my custom board, the MT25TL01G device is wired as:QSPI_BK2_NCS (PC11) as the common chip-select for both banks.I updated my firmware, CubeMX configuration, pin assignments, and the QSPI initialization, and QSPI is now working correctly inside my application firmware.However, STM32CubeProgrammer cannot flash the external QSPI because the supplied stldr file still expects the original chip-select pin (PG6).The external loader obviously needs to be rebuilt with the new QSPI pin mapping.My questions are:Is it possible to modify or rebuild the .stldr external loader for the STM3

Posted on November 05, 2012 at 11:28Revision 2 of RM0090 is available. http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/DM00031020.pdf JW

Hello All,   I am using the STM32H757I-EVAL for one of the development project for Touchgfx, 1) When-ever I am loading/debugging the project using STMCUBEIDE, only in System Mode I am able to detect the Board, but not in Flash mode. 2) With STMCubeProgrammer, I have to connect the device in System Mode, then I have to Erase the Internal and External Flash, then disconnect the Board and Bring the Device in Flash Mode and then Flash the code. Till now I am able to run the Program, But as soon as I disconnect the usb (stlink), The Previously loaded program supposed to run as the mode is still in flash, but I can see anything on screen.  Could anyone please let me know the correct way to do it ? I mean I don't have to load or flash code again and again to test. The program should load from Flash after power ON- OFF-ON.  Just for info 34757228 is the size of the program.

I think I have found a bug in the mentioned file (in my case the file comes from x-cube_azrtos-h7, but the problem seems to be present in other versions to).In the function fx_stm32_sd_driver() there is a check that the passed Databuffer (media_ptr→fx_media_driver_buffer) is 4 Byte alligned, if this is true then the function sd_read_data() uses directly the passed buffer otherwise it uses a local scratch buffer. But after the DMA the function needs to invalidate the cache (by calling invalidate_cache_by_addr), on the Cortex M7 a cache line is 32 Byte.This may overwrite data in the cache out side of the buffer.Correction:Set use_scratch_buffer to false only when fx_media_driver_buffer is 32 Byte aligned and a multiple of 32 Byte.

I've been struggling with this problem for several hours.Using bare metal, I can invoke a non-secure callable from the non-secure application.When I added FreeRTOS + CMSIS RTOS v2 wrapper, and try to do the same from a thread context, I get a hard fault when I try to invoke the non-secure callable (see below)I would assume this is related to the thread stack. I am using the following:Cube MX 6.16Cube IDE Version: 2.0.0 Build: 26820_20251114_1348 (UTC)In the secure project is secure_nsc.c, I define my API: CMSE_NS_ENTRY void ToggleBackLight(void) { HAL_GPIO_TogglePin(BACKLIGHT_GPIO_Port, BACKLIGHT_Pin); } In the non-secure project, I invoke this from a thread as follows:/* Private application code --------------------------------------------------*/ /* USER CODE BEGIN Application */ typedef void (*SecureFunc_t)(void) __attribute__((cmse_nonsecure_call)); void doBlinkyThread(void *argument) { /* USER CODE BEGIN defaultTask */ SecureFunc_t secure_func = (SecureFu

I got a hard time comprehending about the two interrupt lines in the manual. I can really see a "connection" between certain sources to the interrupt lines, nor can i find a register to connect them. It seems to me, that i only can decide what interrupts will fire, and what interrupt line they will go to then. But i cant think of, how i could have both interrupt lines running in paralell. I think i missed something. Is there a better information about this out there?

Hi,I am trying to add FreeRTOS to my project.Board = Nucleo-U5A5ZJ-QTrustzone = enabledFreeRTOS = in non-secure project  I have Trustzone enabled, therefore a secure and a non-secure project is generated by CubeMX. I added FreeRTOS in the non-secure project. Upon building the project, it gives the following errors (the output is modified to remove additional build information and long project paths):  .../GCC/ARM_CM33/non_secure/port.c.obj: in function `vPortSVCHandler_C':[build] .../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c:1042: undefined reference to `SecureContext_AllocateContext'[build] .../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c:1047: undefined reference to `SecureContext_LoadContext'[build] .../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c:1058: undefined reference to `SecureContext_FreeContext'[build] .../Middlewares/Third_Party/FreeRTOS/Source/por

Hello,This is a general suggestion that I would like to make. While I think it's great that all HAL libraries are available on GitHub, I would like to suggest creating a github release for the official versions in addition to creating tags. This can be done on GitHub with just a few clicks. The reason for this is the use of component analysis platforms such as Dependency Track, which make it possible to automatically track the libraries used, a task that is becoming increasingly important. Unfortunately, Dependency Track requires a release in order to track the version. While it is also possible to track this using the commit ID, for example, a release would be the better approach here. I welcome feedback and the possible realization of this suggestion.For Example ARM is doing this with their CMSIS Package: https://github.com/ARM-software/CMSIS_5-Hannes

Hello I have a code use CAN on a stm32U585 he work fine if the CAN bus have not disturbance But if i have to many disturbance for exemple if i make a short circuit bethen CANH and CANL when i remove the short circuit the CAN no restart to send data. I need stop and restart CAN   HAL_FDCAN_Stop(&hfdcan1); HAL_FDCAN_Start(&hfdcan1); After the disturbance, the return value of HAL_FDCAN_GetState() and HAL_FDCAN_GetError() remains unchanged.   How can I immediately know when there is a problem with CAN

Hi there! I'm looking to interface a dual channel 12bits ADC (TI ADS4222) with an STM32N647L0.Using a 58MHz sampling clock, I will generate two 58MSPS data streams feeding into my STM32. The acquisitions will be short, so the raw data will be around 1 MB per channel.I'm wondering whether I can use both the DCMI and DCMIPP interfaces simultaneously to handle the two ADC channels and feed the NPU.Has anyone already tried this? What is the maximum pixel clock for each interface? I'm not sure which application note applies to these devices. Thanks for your help Quentin

Hello,I am working on a custom mixed communication implementation using USART in single-wire half-duplex mode with TX-only operation, level inversion, and interrupt-driven transmission on an STM32G0B0 (RETx package).During testing, I observed the following behavior:When the USART is configured in CubeMX as Single Wire (Half-Duplex) with TX inversion enabled and the line is internally pulled up, no data is transmitted.However, when using asynchronous mode with the same inversion settings, transmission works normally.My questions are:Is this behavior expected when using USART Half-Duplex mode with level inversion and a pull-up on the line?Has anyone experienced this behavior on the STM32G0 USART peripheral?I plan to use USART3, USART4, USART5, and USART6 simultaneously under an RTOS environment, all configured the same way (single-wire, inverted signal, interrupt driven). Under these conditions, should I expect similar transmission issues on all USART instances?All selected pins support

Hello All,I am working on STM32H747I-EVAL for one of the application development where I am using the uart for communication. I am using UART2 with below pins for my commands and response communication with interrupt mode on 115200 baudrate.    PA2   as USART2_TX    PA3  as USART2_RX I am able to send and receive proper command and response using the Docklight can see the communication happening between Docklight and STM32H747I-EVAL  using CM7 on USART2.  When I am trying the same with other STM controller to send and receive the same packets, I am not able to receive the packet from other STM controller, though I am able to see the USART2_TX working(Command send from STM32H747I-EVAL to other STM and it is responding back with some data), now here I am not able to receive the Data (which works with Docklight).  Could you please suggest why or how to get this fix ? Any suggestions or trie

Hi There,I am using a STM32G0 Nucleo MB1455C board with STM32G031K8 processor.Firmware loads ok through USB and runs as intended.For my target application I want to power the board from a 5V supply. According to the user manual that should be possible without any changes to the solder bridges on the board.However when I connect 5V to CN4 pin 4 the red power LED LD2 lights up, 3V3 is present but the processor does not start. It runs when I put 8V onto the Vin pin (CN4 pin 1).This feels like a configuration issue, but the manual seems to indicate this is not needed. A schematic would go a long way, but I could not find one for this board.Any idea what needs to change for the 5V power input to work?Appreciate your assistance.Regards, Peter  

Hello, I wrote a program to test the CAN bus.In its current version, I am using standard CAN at 1 Mb with 8-byte frames.I transmit 16 frames with a 5 ms delay between each transmission.To identify the last frame in the block, I send a frame with a zero data length I am facing several issues. When I configure the CAN bus in INTERNAL_LOOPBACK mode, if I do not enable automatic retransmission, some frames that are reported as successfully transmitted are not received. In NORMAL mode, no frame is flagged as an error on the transmitting Nucleo board, but some frames are never received on the receiving Nucleo, while others are received multiple times. The last issue is that I can only communicate up to 4 Mb. At 8 Mb, transmission and reception errors are reported.  

Dear STMicroelectronics Support Team,I am currently working on a project that uses the STM32F091CBU6 microcontroller. Could you please confirm the current lifecycle status of this part and provide any available information regarding its projected End-of-Life (EOL) date or Product Change Notifications (PCNs)?Additionally, if there is a recommended migration path or alternative part for long-term availability, kindly share those details.Thank you for your assistance.Best regards,Ramanakrishnan A

Dear STM Community,I'm familiar with the STM32CubeMX and the STM32CubeIDE, and I began discovering a motor control evaluation kit.The default project generated with the motor control SDK does not compile with default settings (even without touching an option), even though Cube was able to generate a project, and switched miiediately to the IDE. Most of the files were missing, so I had to manually re-import the whole directory structure, and adding all folders with header files in. I never experienced such a problem with a project directly created with the CubeMX.I've updated all STM tools to the latest version, tried to remove and re-download some STM firmware packages, I got further in the compile process, and stuck at a missing speed_duty_ctrl.h header, awhich I was not able to locate on my computer.In the Motor Control Workbench, I selected STM32CubeIDE as target platform, with matching version numbers for the CubeMX.STM32CubeIDE version: 2.0.0STM32CubeMX version: 6.15.0Mo

 Hi, I am prototyping a PINGPONG project on two NUCLEO STM32WL55JC1 with en.stm32cubewl-v1-3-0 software.I am checking the link at low Rssi values driving one board apart from the other.The parameters are below. I change OUTPUT POWER from 0 to 22dBm.In all trials the receiver stops receiving packets when Rssi gets below -107 dBm.This is far too early. LoRa should receive packets at lower Rssi values. What goes wrong ?

Hi, I am using STM32U083 for one of our project. We are using the I2C peripheral to communicate with NFC dynamic tag through I2C.In STM32U0 datasheet I found that the I2C pins SCL and SDA are 5V tolerent pins.We need the I2C to work independently of the MCU VDD voltage ( MCU VDD 2.5v and I2C pullup resistors to 3.6v).the slave NFC tag will work at 3.6, but I am  not sure of the MCU. Since I2C are open drain and if we meet the Vih and Vil, my thought is it should work.If I can get some confirmation if this is okay or can have any drawbacks or problems will be very helpful.Thanks. 

I am trying to implement peak current mode using STM32G474. I implemented the code using direct register manipulation for high-speed interrupt operation. I confirmed that a sawtooth wave is generated using the following code, and that variables can be adjusted in real-time using the volatile type. When I used a separate project to output the sawtooth wave purely on its own, it worked correctly. However, when I integrated this code into the PCM project, the RST (Reset) works fine, but the sawtooth slope is not visible (The slope is visible when the same logic is used for simple sawtooth output). What could be the reason for this? Also, would implementation using HAL be possible?

I’m working with the STM32U575 and I found in the datasheet that the Flash programming time for a 128-bit (16-byte) write is:118 µs in normal mode48 µs in burst mode(From Table 86: Flash memory characteristics)Before finalizing our design, I need clarification on how these timing values apply in practice:Is the 128-bit programming time the total time per write operation, or is there additional overhead (such as “opening/closing a page” or internal setup time) that needs to be added?If I write multiple 128-bit words sequentially, do I pay the 118/48 µs each time, or is there any extra per-sequence delay?Are there any alignment requirements beyond 128-bit (16-byte) alignment?Do these programming times assume the Flash page is already erased?We plan to evaluate whether the internal Flash write speed will meet our throughput needs, so I want to be sure I understand all timing components correctly.Thanks!

I am developing I2S on the NUCLEO-L433RC-P development board using a BT401 bluetooth audio receiver and MAX98357A I2S amplifier.I need to pass the I2S audio data through the STM32L4333 (refer to diagram below).  I have done this before using a Microchip dsPIC33E but this has both DATA IN and DATA OUT pins for I2S.Whereas the STM32 only has a single DATA pin (SD), so it can only be DATA IN or DATA OUT.Does this mean I cannot use the STM32 to pass through I2S data ? 

When generating code im getting two erros:In timer_if.c:in LoraMac.c: I've been trying to look for some answers but i couldn't really find something useful.If someone can help i'd really appreciate it.Regards.

Greetings,I'm making a USB PD Sink device with a STM32G483 & TCPP01-M12, that will be able to take up to 15V@3A.I started implementing USB PD functionality using STM32CubeIDE 1.19.0 & FreeRTOS. Step by step.The current config is mostly stock, with only a custom BSP_USBPD_PWR_VBUSGetVoltage(uint32_t instance, uint32_t *pVoltage) implementation that reads VBUS voltage & writes it in mV to pVoltage.At init(), firstly MX_USBPD_Init() is called, after that, I'm applying power to TCPP01-M12 & disabling the Dead Battery resistors. Current FreeRTOS config: CMSIS_V2, 16000 bytes heap with heap_4 scheme, NEWLIB_REENTRANT enabledCurrent USBPD config: Full Stack, TIM2 timer, NVIC, DMA set, 2 fixed PDOs, 5V@3A & 9V@3A. Everythink else in Stack Port 0 config is not supported (except SOP). If I understand correctly, the stack should work as follows:At the cable attachment, the source presents 5V on VBUS and sends its capabilities to the sink

Hi all,I am on the lookout for an STM32 microcontroller for a USB Device design where the order of USB D+ and D- pins can be "reversed". What I mean by this is that in most ST MCUs I have reviewed the USB pins are arranged so that D+ is above, and D- below it, as exemplified by the following screenshot from CubeMX and a random MCU:This arrangement makes perfect sense e.g. for SMT USB Micro-B Female connectors as the pin arrangement of such components often nicely aligns with this order.However, what I want to do is use an SMT USB-A Male connector on a PCB board, such as in this run-the-mill USB Flash Memory example form Kingston:When a male connector is used, the pins of the connector are often aligned so that I would have to "cross" the wires in order to match the arrangement that ST MCUs expect.I am aware that I could place the MCU on the bottom side of the PCB and the USB connector to the top side but I specifically do not want to do this, mainly due to the PCB-A supplier I am worki