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In the lower-end STM32L4, covered by RM0394, SRAM is partitioned into two parts, SRAM1 and SRAM2.SRAM2 (besides being "special" in that it has ECC and automatic erase facities), is mapped at both 0x1000'0000 and at the end of SRAM1 in the 0x200x'xxxx area.In Figure 1 System architecture, SRAM2 does not have the connection needed for that second mapping, i.e. to the S-bus of the processor.JW
For the last several days I have been trying to get the virtual COM port [VCP] of my STLINK-V3 MINIE to work together with my NUCLEO-H755ZI-Q. After realising that the VCP_RX/TX pins are not connected to the MIPI10 connector CN5 and thus soldering on my own cables and measuring the signal using an oscilloscope [confirming the signals were the expected 3.3V], I thought it should work.However - even though the VCP was detected under Windows 11 and I double-checked the connection settings in my terminal application - I did not get any communication.The solution seems to have been, to reprogram the V3 MINIE with the "STM32 Debug+Mass storage+VCP" firmware [Version V3J16M9]. After that it worked flawlessly [without changing anything else]. Previously the "STM32 Debug+VCP" V3J16M9 firmware version was flashed to it.So my question is:- Did I overlook some configuration option?- Or is this a problem with the firmware and I should try to contact ST? PS: The STLINK-V3 MINIE was bought
I am using STM32G071RBT6. I am trying to implement encoder mode + output compare mode using same timer. Right now initially I get OC interrupt even when Tim_CCR3IF flag is 0 and once it get set it remains as it is. - Should I combine encoder and OC mode or- should I use another timer
Hello ST Community, I am working on an STM32N6-based board and trying to expose an onboard SD card (SDMMC2) as a USB Mass Storage (MSC) device using FileX and ThreadX. The intended behavior is:When a USB Type-C cable is connected to a Windows PC, the SD card should appear as a USB removable drive with full read/write access. Hardware / Software Setup MCU: STM32N6 SD interface: SDMMC2 (4-bit, polling mode) USB: USB OTG HS (Device mode, MSC class) RTOS: Azure RTOS ThreadX File system: FileX Toolchain: STM32CubeIDE OS on host: Windows 10/11#if (FX_STM32_SD_DMA_API == 1) /* the SD DMA requires a 4-byte aligned buffers */unaligned_buffer = (UINT)(media_ptr->fx_media_driver_buffer) & 0x3;#endif unaligned_buffer always evaluates to 0 because the buffer is aligned, but this does not resolve the issue. Specific Debug Observation (FX_DRIVER_BOOT_READ)During debugging, I observed that FileX always enters FX_DRIVER_BOOT_READ, and the following code path is always executed: c
Hello,I have created two BIS channels eng and esp, under BIG main group by assigning bis[0] and bis[1] and given left and right channel as the input. At the receiver side, the first channel [0] will perfectly get connect and displays "synced with some freq as assigned" but for the second one it doesnt like that and no data is streaming. How to correct the issue. Kindly do the needful.Thank you
The parameters for the AT+TCONF are shown differently in your example to where you show the breakdown of the individual paramters.In your example you show the <cr. parameter on the command line as 4/5 868000000:14:125:12:4/5:0:0:1:255:0:0:0where in the description of the parameters on page 28 you show that 1: represents 4/5, so shouldn't command line look like this instead 868000000:14:125:12:1:0:0:1:255:0:0:0
In function LL_RTC_ALMB_SetDay of file stm32u0xx_ll_rtc.h line 2198 Original:__STATIC_INLINE void LL_RTC_ALMB_SetDay(RTC_TypeDef *RTCx, uint32_t Day){MODIFY_REG(RTC->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU),(((Day & 0xF0U) << (RTC_ALRMBR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_ALRMBR_DU_Pos)));} Missing x in RTC->ALRMBR __STATIC_INLINE void LL_RTC_ALMB_SetDay(RTC_TypeDef *RTCx, uint32_t Day){MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU),(((Day & 0xF0U) << (RTC_ALRMBR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_ALRMBR_DU_Pos)));} Personal opinion: I would recommend compiling code with the -Wall, -Wextra, and -pedantic compiler flags.From my point of view, confidence in the quality of code that contains such easily detectable errors is greatly limited. For this reason, I prefer not to use HAL drivers.
Hi,I'm currently working on a project using an SMT32G474RET6. We have the X-Cube-STL with us and trying to integrate it into our project. We have followed all the steps as mentioned in the document and we are able to run the test for our software, but it kept failing for CPU in Multiple test and for Flash in Single test. We also tested the example codes on the Nucleo -G474RE, it works there but not with our project.Any idea what could be wrong? what thing should we check to resolve this issue. I have tested the Artificial failing example within our project, and it seem working fine, but the single test and multiple tests are not working.
Hi! I am trying to do a simple communication between nucleo-f411re and nucleo-h753zi board using uart communication. but i am unable to set it up. Is it possible? If yes, what is the easy way to do that. How the connections and wiring look like?
Hello STM32 Community,I am using the STM32H753 microcontroller in a project with the following setup:Display: 10-inch RGB display (1280x800 resolution).External Memory: Parallel NOR flash and SDRAM.TouchGFX: For GUI development.The system is configured to use external SDRAM for the framebuffer and NOR flash for storing images and other assets.Problem:When switching screens in the GUI, the display flickers briefly. The flickering is particularly noticeable during transitions with animations or large screen changes.What I Have Tried:Double Buffering: Enabled double buffering in TouchGFX to reduce tearing and flickering.LTDC Configuration: Checked the LTDC clock settings to ensure proper synchronization.DMA2D: Verified that DMA2D operations are correctly configured for image transfers.External Memory Timing: Adjusted the timing configuration for the NOR flash and SDRAM to match the datasheet specifications.Despite these efforts, the flicker persists.Additional Information:LTDC and DMA2D:
背景描述:1.我现在使用的是:STM32Cube_FW_WB0_V1.4.0\STM32Cube_FW_WB0_V1.4.0\Projects\NUCLEO-WB09KE\Applications\BLE\BLE_DataThroughput_Server中BLE_DataThroughput_Server例程2现在使用的是STM32CUBE6.16进行配置需要帮助:1BLE_DataThroughput_Server例程中用到了UART1RX和UART1TX,我的项目中这两个引脚另有他用,但是我在这个例程的基础上去除这两个引脚后,例程不能进行蓝牙通信了,我不知道那个参数影响到蓝牙通信?这两个引脚与蓝牙通信的关系?2能否提供本身并不使用这两个引脚的,蓝牙通信的例程(只实现蓝牙通信)?
hi i have been working to intergrate a parallel RGB dispay with stm32h7A3ZIT6 with the help of LTDC . and pretty much made it working the display has this configuration . this one worked pretty well with the stm LTDC and then i bought a new display it has a differnt configurations like this this one is in HV mode whats changed? can i stilll use stm ltdc to drive this . and whats the differance between these displays.????
Hi, I’m trying to better understand how the USB PMA and BTABLE work on the STM32F103. After reading the reference manual, I’m still unsure how the descriptor table size relates to the number of endpoints.I have two possible interpretations of how the USB Descriptor Table and PMA layout work on the STM32F103, and I need clarification from ST to confirm which one is correct.I will provide two diagrams (Figure A and Figure B) to illustrate the scenario, assuming BTABLE offset = 0.Scenario: BTABLE = 0x0000Figure A (Fixed 8×8 bytes BTABLE)In this interpretation:The USB descriptor table is always 8 × 8 bytes = 64 bytes (0x0000–0x003F), assuming the device supports 8 endpoints.The usable PMA buffer area always starts at 0x0040, regardless of how many endpoints are actually used (for example, even if only 3 endpoints are used).Therefore the usable PMA region would always be 0x0040–0x0200.Question A:Is this interpretation correct? Is the descriptor table size always fixed at 64 bytes in the STM
Hi,In the GPIO interrupt configuration, the port information is ignored and only the pin number is used for identification. As a result, pins with the same pin number on different ports cannot be enabled as interrupt sources at the same time. stm32_gpio_irq_line_t stm32_gpio_intc_get_pin_irq_line(uint32_t port, gpio_pin_t pin){ ARG_UNUSED(port); return linenum_to_ll_exti_line(pin);} int stm32_gpio_intc_set_irq_callback(stm32_gpio_irq_line_t line, stm32_gpio_irq_cb_t cb, void *user){ const struct device *const dev = DEVICE_DT_GET(EXTI_NODE); struct stm32_exti_data *data = dev->data; uint32_t line_num = ll_exti_line_to_linenum(line); if ((data->cb[line_num].cb == cb) && (data->cb[line_num].data == user)) { return 0; } /* if callback already exists/maybe-running return busy */ if (data->cb[line_num].cb != NULL) { 
I am using STM32 Nucleo-l476rg. I am trying to use the CAN peripheral and have tried every resource I came across. I am unable to send or receive messages:I have no filter, everything is wired correctly, what could be the issue? I even made it so that it just toggles an LED when the interrupt occurs. In case the interrupt is not set up properly, I have it polling HAL_CAN_GetRxFifoFillLevel, and if it is >0, it toggles the LED, but the LED never toggles. Am I missing something that is not autogenerated after configuring the peripherals in the .ioc file? In all the videos I have watched, it seems quite straightforward. What am I missing?
Hi,I'm powering nucleo with 3.3V directly to CN4/14 +3V3. SB14, SB9 are removed, JP1 is open. Works fine, BUT current is much higher than measured over JP1 when powered from USB?? USB is powering U5V which is powering ST- link 5V and 3V3 which is a 'parallel' power line to U3->VO->+3V3 and they should not have any sink in common??So where is +3V3 'leaking'? to ST- link circuit?? In UM1956 there is in section 7.4.2 a paragraph:+3V3 power supplyUsing the +3V3 (CN4 pin 14) directly as a power input can be interesting, for instance, if3.3 V is provided by a shield board. In this case, ST-LINK is not powered, thus programmingand debugging features are unavailable. When the board is powered by +3V3 (CN4 pin 14),the solder bridge SB14 and SB9 (NRST) must be off. So could someone please assist me what am I doing wrong or what is missing or.... BR, ristoH
Dear all,with the latest update of STM32Cube_FW_WBA_V1.8.0, the BLE_p2pServer_TZ example no longer works. The following error occurs during compilation:make: *** No rule to make target 'C:/0_ST_abc/Example/Projects/Common/WPAN/Interfaces/app_bsp.c', needed by 'Application/User/Common/WPAN/Interface/app_bsp.o'. Stop. If I copy the missing file from another location in the folder structure, it is deleted every time STM32CubeMX is used to regenerate the project.Even when using a copied of this file from a previous firmware version, the button is not recognized by the ST BLE Toolbox.Is there a simple workaround to get this project running?Thanks in advance.
Hello,I'm looking for some clarification over how the PCROP area can be used. The user manual for STM32L471 states that code in this area can be executed but that data at flash in this area cannot be read. Does this mean if I put a decryption algorithm in this area that I cannot also put the key in this area also? As is would be unreadble? Nick.
Hi, I want to start a new project with a STM32H503 (might be), and I read many threat talking about USBX FILEX now on this kind of microcontroller.As it is a bootloader, I do not want to use any RTOS.I use to do bootloader with USB host interface to update the firmware with STM32H7 or STM32F7, but with old stack. Can you please confirm I will be able to develop a bootloader (usb host) to get a binary file on a USB stick storage using USBX and FILEX, WITHOUT any RTOS on a STM32H5 ? Every exemple I found is for device standalone, not host USB.Is there any up to date example with USB host MSC flash stick using USBX and FILEX to start ? Sébastien
Owing to a developer (me) firmware blunder, I successfully "bricked" several STM32C011J6 (SO8 package) devices so that I cannot access them using STM32CubeProgrammer and STLINK.My error was this - my firmware reconfigured pins 7 (SWDIO) and 8 (SWCLK) as GPIO immediately after reset and also initialized pin 1 (nRST) as GPIO at the same time (rather than looking for another pin (button press during power up) that would have held off these steps).After my errant firmware was installed via STM32CubeProgrammer and STLINK, the STLINK device was/is no longer able to connect to the device.I am using STM32CubeProgrammer version 2.21.0 and a USB-attached STLINK device.I have transplanted one of the affected (few) devices to a PCB containing only a connector for the STLINK device, power, ground, and Pin 1 (NRST), so there is no other hardware potentially interfering with STLINK connection.As pin 1 (nRst) was repurposed at start-up time, I don't believe hardware reset (set by STM32CubeProgrammer)
Hello,I recently bought the newly released development kit STM32N6570-DK that includes a touch screen and a MIPI camera manufactured by ST. It comes preprogrammed with some nifty demos, including the AI demo which should show off the AI capabilities with a stream from the included camera. When I load the AI demo the screen freezes up, and I can see the backlight to the screen turn off.Additionally I noticed there are some level shifters (TR1 on the camera module) on the PCB for the camera that either carry a clock or data line for MIPI. When I activate the demo the 3.3V line starts toggling at about 160MHz for about 2ms, and then stays low after that.For reference, I am powering the dev kit off of a USB 3.0 port on my laptop.Could you help me identify if this is a camera module, dev kit, power, or cable issue?Thanks,-Alex
Hello Community,I have been working on a BLE project in which the server needs to send notification of a characteristics that is up to 512 bytes long. As in previous CubeMX versions (6.12 and before), I was expecting CubeMX to generate the function Custom_<CHAR_NAME>_Send_Notification() within custom_app.c to properly call aci_gatt_update_char_value_ext(), which indeed supports chars up to 512 (see code below).However, this is no longer the case from Ver. 6.13 onwards. Instead, CubeMX now generates only functions based on aci_gatt_update_char_value(), which handles lengths lesser than the limit (BLE_CMD_MAX_PARAM_LEN - 6), which is 243 maximum. Needless to say, my project no longer works without the proper notification function.ST Support said that the latest CubeMX behavior is "normal", but it did not explain why the code generation was changed, and most importantly how to handle long characteristics in the latest examples and documentati
Hello, I have a problem that I am having a hard time figuring out.My project is using an STM32H743 as a USB host on a custom PCB. Both OTG_HS and OTG_FS ports are connected to different devices. OTG_HS is using the internal PHY and operating at full-speed. An LTE modem located on the same PCB is connected to the OTG_HS port, and a CP2105 located on a separate PCB is connected to the OTG_FS port via a 10ft cable (D+ and D- wires are twisted and shielded). The CP2105 and host exchange ~1KB of data via bulk transfer every 1 second, while communication with the LTE modem is currently only during manual testing aside from enumeration. I used the USB host drivers generated by STM IDE and modified them to work with each device.The problem I'm running into occurs with the OTG_FS port. Occasionally, the communication will come to a complete halt. The URB state returns as URB_IDLE after the host tries to transmit data. Looking at the data signals, there is no data being transmitted from the host
Hi,I'm facing some issues with some STM32G474RET6s, and want to rule out counterfeit chips, even if that seems unlikely.After googling for some solutions, I confirmed the AP IDR register and the DBGMCU_IDCODE both hold a revision ID of 3, which I expected from the X code on the label. However, I noticed that the markings on the chip match the LQFP80 footprint, rather than the LQFP64 we purchased.I have read the qualifications about how device markings can differ, but it doesn't hurt to ask: is this outdated documentation, or is there a possible issue?Thanks.
Dear all, i have a problem with my custom board based on STM32H745.I need to use core M4 with USB_HS host with mass storage class (a pen drive) at 12Mbit full speed (internal Phy transceiver).I have configured the processor as per attached file (core M4, FatFS, USB host, 48MHz RC clock for USB).The problem is that the FATFS Applistate variable is always in "application start" and never became "application ready". So that USB pen drive can not be mounted.Previously, I succeded in use the FATFS pack with the same functions configured with core M7, but I want to use core M4 because I need it in my project architecture.Consider that with the same FATFS pack I'm able to use SD card on the M4 core.I can't figure why I'm not able to migrate the USB HS host from M7 to M4.See also attached the function where the USB Host should be recognized and configured to receive data (in my project microSD card store datas and I want to download it to pen drive)
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