STM32 MCUs

I've had problems with sd_diskio.c used for SD card I/O with FatFs.CubeMX version is 6.16.0.I'm using SDMMC with DMA, so consideration needs to be given to cache coherency and alignment.I have both these set:#define ENABLE_SD_DMA_CACHE_MAINTENANCE  1#define ENABLE_SCRATCH_BUFFERHowever, I've found some bugs in the code:In SD_read, the alignment check:#if defined(ENABLE_SCRATCH_BUFFER)if (!((uint32_t)buff & 0x3)){#endifshould have the 0x3 changed to 0x1f, as cache alignment requires 32-byte alignment, not 4-byte.There's another case of this in SD_write.Furthermore, there's a bracketing problem in SD_write with the code under ENABLE_SCRATCH_BUFFER conditional compilation, which is supposed to be invoked when the buffer is misaligned as an else condition for if (!((uint32_t)buff & 0x1f), but is instead an else condition for a DMA success check. This means that the scratch buffer code does not run at all when a buffer misalignment is detected.To fix it, I added a closing brace

Greetings!I have the following system:STM32U073CCVBAT pin is connected to a super-cap, and it's voltage was measured to be above the required minimum.During system reset (NRST) it behaves according to my expectations, the RCC_BDCR remains unchanged, but if it is disconnected from Vcc, then upon connecting it back, the LSESYSEN bit is set to 0. This seems reasonable, and is generally not a issue to me, but the reference manual claims that this shouldn't happen? (Everything else works perfectly.)Am I missing something obvious here?Couldn't find any other mention of the bits behaviour.

Hello ST Community team,About the Typo, on the Table 1 of the RM0473, we have a reserved region between SRAM1 and SRAM2a (from 0x2000 3000 and 0x2002 FFFF) the size of this region is 180 Kbytes and not 36 KBytes as mentioned on the Doc.please have a look at this.

I am configuring a dual-CPU project for the STM32WL55JC in CubeMX. This microcontroller has two CPUs: a Cortex M4 and a Cortex M0+. CubeMX lets users select the CPU that each peripheral is bound to. As illustrated in the image at the bottom of this post, the SUBGHZ peripheral is forced into being used by the Cortex M0+. In case the text in grey box in the image is unclear, it says "Peripheral SUBGHZ could not be removed from context "Cortex-M0+ (M0P)" as it's forced for this Peripheral."However, the datasheet says "An RF low-layer stack is needed and is to be run on CPU1 or CPU2, whereas the host application code is preferably run on CPU1." (Page 15). Here, CPU1 refers to the Cortex M4 and CPU2 refers to the Cortex M0+. This implies to me that the SUBGHZ peripheral should be bindable to either CPU.  Can the SUBGHZ peripheral be operated by the Cortex M4, or is the Cortex M0+ only capable of using it?

Hello,    We have developed an image capturing application successfully based on STM32H7xxxx and OV7725 camera. We are now targeting to port the application to target STM32U5xxxx with the same camera. But it looks the DMA doesn't works as expected. The DCMI DMA complete callback is firing with no image data in the target buffer.     Please guide us how to port the application from H7 to U5.Best regards-Shubhendu Bikash BanerjeeAttaching here snaps of the configurations we made so far.DCMI GPIODCMI NVICDCMI parametersGPDMA1 channelsGPDMA1 CH0GPDMA1 securityCode snippet:#define IMAGE_FRAME_WIDTH 320 #define IMAGE_FRAME_HEIGHT 240 #define IMAGE_BYTES_PER_PIXEL 2 #define IMAGE_BYTES_COUNT (IMAGE_FRAME_HEIGHT * IMAGE_FRAME_WIDTH * IMAGE_BYTES_PER_PIXEL) static uint32_t gDCMIBuff[IMAGE_BYTES_COUNT / sizeof(uint32_t)] = { 0 }; static volatile bool gWaitForFrame = false; CaptureFrame{ gWaitForFrame = true; halReturn = HAL_DCMI_Start_DMA(&hdcmi, (uint32_t) DCMI_M

Hi，Recently, I have been evaluating the DAC accuracy of STM32H743. The data sheet mentions the SNR and ENOB , but I have no idea how to test it. Could you please provide a testing method or a testing plan? Looking forward to your reply.

Hello @Imen.D , A side question: RM0440 for G4 says oversampling mode does not support offset. Any change to this position as like the H7 change?  Solved: 'H7 ADC offset correction in oversampling mode - STMicroelectronics Community Thank you. SK

Hi everyone,I’m bringing up USART2 on an STM32 using bare-metal Rust (#![no_std]), direct register access (no HAL, no CubeMX).The CODE looks correctlyHowever, the data itself is wrong.Instead of transmitting 'A' (0x41), the terminal consistently receives values like:0xCE0x05(always stable, but never 0x41).#![no_std]#![no_main]use core::ptr::{read_volatile, write_volatile};use core::panic::PanicInfo;use cortex_m_rt::entry;#[panic_handler]fn panic(_: &PanicInfo) -> ! {loop {}}#[inline(always)]fn r(addr: u32) -> u32 {unsafe { read_volatile(addr as *const u32) }}#[inline(always)]fn w(addr: u32, val: u32) {unsafe { write_volatile(addr as *mut u32, val) }}/* ================= BASE ================= */const RCC: u32 = 0x4402_0C00;const GPIOA: u32 = 0x4202_0000;const USART2: u32 = 0x4000_4400;/* ================= RCC ================= */const RCC_AHB2ENR: u32 = RCC + 0x08C;const RCC_APB1LENR: u32 = RCC + 0x09C;const RCC_CCIPR2: u32 = RCC + 0x0DC;/* ================= GPIO =======

Hi everyone,I’m currently working on a project using the ST B-G431B-ESC1 discovery kit to drive a 24V 250W BLDC hub motor. I'm using the SimpleFOC library for control and have added a small heatsink to the board to manage temperatures.The issue is that after running for a short period, I keep losing MOSFETs; they just randomly burn out. The motor wasn't even under heavy load when it happened, but I was trying to tune the PID, so there was some jerking.What could be causing this? Is it likely an overvoltage spike, an overcurrent issue, or something else entirely? How can I find the root cause, and is this board truly capable of driving a 250W–350W motor continuously, even with enough cooling?

Im using STM32SD library on my stm32f407vet6 board.  I want to make a logging system for my application. My initial logic is: on setup we count number of files in our root directory and create a new file named dataLog{fileNumber}. Then we write data into that file and check if its not empty. In given code example im always getting only last write into file (fouth write). As ive got this library only works in FILE_WRITE or FILE_READ modes. I trtied to use FA_OPEN_APPEND modifier but when im using this im getting errors while file creating.And another thing is that im always getting a lot of initialization errors and file open errors overall while using this library, maybe it depends on me using stm32f407vet6, any advices would be great. Now i will try to use an advice from github issue of "unstable work with sdcard on stm32f4" - i'll try to redefine the value of the SD_CLK_DIV to bigger value.     #include <STM32SD.h> int fileNumb

Hello,I am trying to get Ethernet-over-USB working on a STM32U585. I want to be able to use both RNDIS and CDC-ECM, but I decided to start with RNDIS first. After a lot of trial and error and research, I am running out of ideas as to why my PC does not show any devices in USB Viewer on the port where I connected the circuit board. I am developing on a B-U585I-IOT02A.I based my work on the following example: https://github.com/STMicroelectronics/stm32-usbx-examples/tree/main/Projects/STM32H735G-DK/Applications/USBX/Ux_Device_RNDISI provide my code here (if not mentioned it is generated by CubeMX). I did not touch files if code is not shown here:main.c: int main(void) { /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* Configure the System Power */ SystemPower_Config(); /* Configure the system clock */ SystemClock_Config(); /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_ICACHE_Init(); // HINT: this function

我使用的芯片是G071RB，当我使用STM32UCPD发status，直接从FF01(PD协议的DP模式)变成0x00000，并且在抓包发现再发送的时候没有发VDO000000001，返回的数据中HPD为0，有没有大佬知道怎么解决 Translation: I'm using the STM32G071RB MCU. When I send a status update using STM32UCPD, it jumps directly from FF01 (DP mode of the PD protocol) to 0x00000. Packet capture shows that VDO000000001 is not sent during retransmission, and HPD is 0 in the returned data. Does anyone know how to solve this?

Hi everyone,I’m using an STM32L562 MCU and outputting LSE (32.768 kHz) to MCO for measurement.In LSE crystal mode, I see a large frequency deviation on the oscilloscope (much larger than expected ppm-level error).To rule out the crystal itself, I checked the 32.768 kHz crystal and it seems OK.Then I tried LSE bypass mode (feeding an external 32.768 kHz clock into the LSE pins). In this case, the MCO output frequency error becomes very small, and the waveform/frequency looks correct.So I suspect there might be an issue with the LSE oscillator circuit (load caps, PCB layout, drive strength, leakage, etc.) when running in crystal mode.Questions:Has anyone experienced large LSE frequency error in crystal mode on STM32L562 / STM32L5 series?Any common root causes (wrong load capacitors, stray capacitance, drive level, board leakage, etc.)?Any recommended debugging steps or configuration tips (e.g., LSE drive settings, oscillator startup behavior, measurement method, etc.)?Thanks in advance!&

Hey,  I am using the STM32G0B0VET (16MHz HSE) with a virtual com port over USB. The virtual com port is working fine but as a backup I would love to be able to let the user reflash the device. I was thinking of using the DFU for this since then the user would only need a standard USB cable (consumer electronics hopefully high volume). I exposed a button that can pull BOOT O high (small reprogram button you have to push). (Normally in the field updates are not needed but I would like to have this as a backup). Now I have the following problem when I boot the device (that is flashed) when pressing the button (keeping BOOT 0 high) my PC sees the virtual COM port and not the DFU device. It is thus running the usual code and not entering the bootloader. If I erase the STM32 with the ST link I can access the DFU just fine with the boot button. Does anybody have a fix for this?  Best regard and thanks already for the help.  

Hello, I am driving a motor using the STEVAL-SPIN3201. The code is generated via the mc workbench.When I test the programm, the motor behaves like that:The motor starts up slowly according to the start up procedure I chose in the workbench.Then suddenly the motor moves with fullspeed for some seconds.After this the motor slowes down to the desired speed. Now I am able to change this speed via the motor pilot. When I change the Kp and Ki value, I can reduce the duration of the "full speed periode". However, it is still there. Can you explain what is happening and why the motor moves to full speed for a short time? Thanks a lot for your help!Florian

I have one question regarding the HAL_FLASH_Program function. I use the HAL_FLASH_Program many times during the runtime of the firmware. I use it to store log, warnings and errors in the several flash pages. When the page is full and I must write into it I erase the page, obviously.   However, at the very begining I also want to store the "reset cause" (an entry in the flash pages) of the last power cycle (switch on off). Was it a BOR, WWDOG, IWOG, PINRST, etc, etc,..? Unfortunately, I am unable to successfully use HAL_FLASH_Program with a HAL_OK. It seems as if HAL_FLASH_Program does not work at the very beginning of the firmware application... does it sound crazy? Could it be that this function needs some time to work.  /** * @brief The function's role is to save the log data into the log page/s. */ mid_error_t flash_program_loop_2(const uint8_t * data_in) { HAL_FLASH_Unlock(); /** * first we check if the next position to writ

Hi,i have  new design that i am migrating to the STM32G071 and having issues with the SPI1 port PB3,PB4,PB5. Changing CPOL and or CPHA during init code do not seem to have any impact, when powered down and restarted.I am seeing 9 clock pulses when set to 8 bit data. Suspect this might be issues with the overall SPI setup.the init code is simple changed to the absolute simplest format.ignoring setting the PB3,4,5 GPIO pins as they are good i can see the signals on the cro// bidirectional mode full 2 lineSPI1->CR1&=~SPI_CR1_BIDIMODE;// set as masterSPI1->CR1|=SPI_CR1_MSTR;// CPOL clock idle lowSPI1->CR1&=~SPI_CR1_CPOL;// CPHA rising clock edgeSPI1->CR1&=~SPI_CR1_CPHA;// set LSBFIRST low we send MSB firstSPI1->CR1&=~SPI_CR1_LSBFIRST;// set up SSM pinSPI1->CR1&=~SPI_CR1_SSM;SPI1->CR1&=~SPI_CR1_SSI;// configure data size 8 bitsSPI1->CR2|=(SPI_CR2_DS_2|SPI_CR2_DS_1|SPI_CR2_DS_0);// set the reception thresholdSPI1->CR2|=SPI_CR2_FRXT

下面是我的部分函数，普通串口按照这个配置，是可以正常进入回调函数，但是LPuart却不能进入回调函数，不知道问题出在哪里，使用stm32cubemx6.16.0,附件是ioc文件，   Post Edited by ST moderator to apply source code formatting and translate from Chinese to English to comply with the community rule:   Below are some of my functions. With this configuration, the standard serial port can enter the callback function normally, but LPuart cannot. I'm unsure where the issue lies. Using STM32CubeMX 6.16.0. The attached file is the I/O configuration file.   void StartControlPowerTask(void const * argument) { /* USER CODE BEGIN StartControlPowerTask */ HAL_StatusTypeDef ret; __HAL_UART_ENABLE_IT(&hlpuart1, UART_IT_IDLE); __HAL_UART_CLEAR_IDLEFLAG(&hlpuart1); ret = HAL_UARTEx_ReceiveToIdle_DMA(&hlpuart1, rxl1_dma_buffer, RX_BUFFER_SIZE);//rs232 /* Infinite loop */ for(;;) { osDelay(1); } /* USER CODE END StartControlPowerTask */ } void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { if (huart->Instanc

If I am correct, the descriptions of - HRTIM_ADC2R   -  Bit 22 - HRTIM_ADC3R   - Bit 19   - Bit 13 - HRTIM_ADC3R   - Bit 22   - Bit 13   - Bit 10   - Bit 5   - Bit 4   - Bit 0are not correct in the RM.They all describe trigger event generation but the trigger output in all these seem wrong:E.g.: HRTIM_ADC2R, Bit 22,Original Text: "This bit enables the generation of an ADC trigger upon timer C reset and roll-over event, on ADC trigger 1 output."It should be: "This bit enables the generation of an ADC trigger upon timer C reset and roll-over event, on ADC trigger 2 output."Also, I want to ask, if this forum is the right place to give feedback on documentation issues?Best Simon

I am working with the following tool versions:MC Workbench: v5.4.8STM32 Firmware Package: v1.11.3STM32CubeMX: v5.6.1Since I don’t have the Bull Running C1700KV motor, I’m using a 900KV motor with a 6S battery. I’ve already run the profiler, obtained the motor results, and entered those parameters into MCSDK.My question is: Which additional parameters should I adjust to generate reliable firmware for this setup? 

Hi!If I look at the datasheet of STM32WL31xx, I find Table 34. PA impedance which tells e.g. an optimum load impedance of 32 Ω // 16 nH in line 5 (high power, 868MHz) This STM32WL31xx is (according to the datasheet) available in VFQFPN32 and VFQFPN48 packages.-----Now, while reading the AN5457 (RF matching network design guide for STM32WL Series), I get confused. This AN should cover the whole STM32WL31 and STM32WL33 series , right? So It should definitely be valid for my STM32WL31K8 in VFQFPN32 pakage?Now to my questions:1.) If the AN5457 is applicable, why does PA matching impedance measurements in Appendix A not contain any PA impedance measurements for the VFQFPN32 package?2.) If I compare the datasheet PA load impedance given at the top of this post with the "next best" data of the UFQFPN48 package, the values are not anywhere near that of the values in the datasheet. Can anyone tell which impedance value I should use as a starting

Hello, I'm having troubles building the two projects of the STM32 Nucleo WL55JC1 belonging to the LoRaWAN End Node DualCore Example under Linux (Ubuntu 24.04). It works on Windows 11, though.Until now I have all projects developed on Linux, this is my preferred OS. The single core version of the LoRaWAN End Node works perfectly under Linux.When I try to compile the project for the CM0PLUS, I get this error:arm-none-eabi-gcc -z max-page-size=1 -o "LoRaWAN_End_Node_DualCore_CM0PLUS.elf" @"objects.list" -mcpu=cortex-m0plus -T"/home/bgoedel/STM32Cube/Repository/STM32Cube_FW_WL_V1.3.1/Projects/NUCLEO-WL55JC/Applications/LoRaWAN_FUOTA_DualCore/LoRaWAN_End_Node_DualCore/STM32CubeIDE/CM0PLUS/STM32WL55JCIX_FLASH.ld" --specs=nosys.specs -Wl,-Map="LoRaWAN_End_Node_DualCore_CM0PLUS.map" -Wl,--gc-sections -static -L../../../../Linker_Common/STM32CubeIDE -L../../../../2_Images_SBSFU/STM32CubeIDE/CM0PLUS/Debug --specs=nano.specs -mfloat-abi=soft -mthumb -Wl,--start-group -lc -lm -Wl,--end-group

Dear ST Team,I am using an STM32H5 series microcontroller in my design and I am trying to understand the overall power consumption contributed by different MCU interfaces.So far, I have identified the following:The typical maximum current on VDD, in VOS0 condition with all peripherals enabled, at 85 °C, is approximately 118 mA (based on STM32H5 datasheet values).My Question:I tried to find similar information for the VDDIO supply pins.However, the datasheet only provides peripheral-wise consumption in µA/MHz, which appears to apply to low‑power (sleep) modes, not active RUN‑mode.I want to calculate the VDDIO current consumption for my specific design configuration.My active interfaces are:16‑bit SDRAM on FMC, operating at 166 MHzQSPI Flash memorySPI interfacesUART interfaces4 ADC channelsApproximately 50 GPIO pinsThe MCU is operating at 250 MHz (VOS0) in RUN mode.Thank you.Regards,Rajesh Matere 

Hello ST Community,I am currently designing a board based on the STM32WL55 and I am aiming to optimize the BOM by utilizing the MCU's internal programmable high-speed capacitors, avoiding external load capacitors for the 32 MHz HSE.I am referencing AN5646 ("How to select a 32 MHz HSE oscillator for STM32WL5x/Ex MCUs") to ensure correct implementation. The Application Note suggests inserting a series capacitor (C_SERIE) to enhance stability over temperature changes when using the internal capacitor bank.However, I am having trouble understanding the derivation of the formula provided in the document regarding the final Load Capacitance (CL) seen by the XTAL when this series capacitor is introduced.My specific question is:Intuitively, I would expect the total load capacitance to be the result of the series combination of the added C_SERIE and the equivalent capacitance usually seen by the crystal (which is the series combination of the internal caps, CL1 and CL2 plus stray capacitance C_

https://community.st.com/t5/others-stm32-mcus-related/ov7670-stm32f429-dcmi-dma-ili9341-spi-lcd-works-no-camera-image/td-p/864331#M9012 I am trying to display a camera image on an LCD using the STM32F429I-DISCO board, an OV7670 camera module, and an ILI9341 display.↑This is a follow-up to my previous post. However, the displayed image is extremely blurred, and it is difficult to recognize what is shown on the screen.What should I check or adjust to display the image clearly?