Solved

Posted on March 01, 2018 at 10:22Hello !I found something which is probably a bug on the L4+ series stm32l4wwxx.h files (in example stm32l4r5xx.h)There is the following code : (lines 14359 to 14364 in stm32l4r5xx.h )&sharpdefine SDMMC_STA_DPSMACT_Pos (12U)&sharpdefine SDMMC_STA_DPSMACT_Msk (0x1U << SDMMC_STA_CPSMACT_Pos) /*!< 0x00001000 */&sharpdefine SDMMC_STA_DPSMACT SDMMC_STA_CPSMACT_Msk /*!<Data path state machine active */&sharpdefine SDMMC_STA_CPSMACT_Pos (13U)&sharpdefine SDMMC_STA_CPSMACT_Msk (0x1U << SDMMC_STA_DPSMACT_Pos) /*!< 0x00002000 */&sharpdefine SDMMC_STA_CPSMACT SDMMC_STA_DPSMACT_Msk /*!<Command path state machine active */You may see that DPSMACT and CPSMACT are inverted between macros names and values.This is present for all STM32L4+ headers available in en.stm32l4.zip (CubeL4 software, available on ST.com on March 1st 2018)By the way, is there a more 'official' way to report such error or is posting on the forum is t

Posted on April 05, 2018 at 10:56We are trying to increase the clock speed of our STM32 on our custom board but we encountered some difficulties.At the moment, we set a clock of 56 MHz, using HSI and an PLL of 112 (with CubeMx). It works fine.But when we set a clock of 96 MHz by setting the PLL to 192, we get Hard Fault, Usage Fault or Bus Fault when debugging.We tried increasing the flash latency, but it does not work better. The power supply seems good (around 3,2 V).We were missing the Vcap on the board, but we fix that. Not better.What can we look at to debug this problem ?#cpu-clock-frequency

Hi everyone, I'm developing IAP with stm32f446vct6. In the main function of your example, the application address is checked for 0x20000000 after masking with 0x2FFE0000. However, the f446 reads always the 0x20020000 for the application address and not pass this statement. Why does it read 0x20020000 data? Is it specific value for every MCU? (I tried this data in f303 and it read the 0x20000000 and passed.)

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Posted on June 28, 2018 at 18:34STM32H743To improve the accuracy of the temperature sensor measurement, each device is individually factory-calibrated by ST. The temperature sensor factory calibration data are stored by ST in the System memory area, which is accessible in Read-only modePlease could someone point me at where I can find information on how to read the calibration parameters. Can't see anything in the device manual, the H7 reference manual or the HAL manual but probably missed it.

Hallo. I'm using SPI and DMA on a STM32L433, to receive data from an external board, and I would like that an interrupt was fired at reception of the 4th byte.I've set the SPI3 (that is in slave receive only mode because I'm using MISO pin for other things) to trigger the DMA2 channel 1 at reception, as shown in the attached images.The problem is that when I send the 4 bytes pachet (I've seen the 4 bytes by a scope connected to SCKL and MOSI pin), the interrupt is not fired.The strange thing is that even if the dma request bit in SPI peripheral is set (RXDMAEN bit in CR2 Register), the last byte received is waiting in the spi rx fifo (FRLVL bits in SR register) and is not moved by dma, infact the dma transfers counter (CNDTR1 register) says that 1 more byte is needed to complete the transfer and finally, firing the interrupt!The question is why the last byte received by SPI stays in the SPI receive buffer and is not transferred by DMA to memory destination?Ideas?DmaSettingsPre and SpiS

Starting from rm0090 up to rm433, the DMA_SxFCR register offset is given as"Address offset: 0x24 + 0x24 × stream number"The multiplicator is obvious wrong and should be 0x18.Regards

RM0433 Rev 5 in chapter 7.1. talks about "Hold boot function". The reference manual dose not come up with some explanation later.Please explain.

RM0433 talks about a BDMA_CM1ARx register and lists it in the register maps. The description in rm0433 for BDMA_CM1ARx seems to be tha same as for BDMA_CM0ARx. The device headers only talks about the CMAR register.Please clarify.

HiI have used STM32F030RC.I program the flash memory, using bootloader from PA9 and PA10.I have programmed the microcontrollers first time successfully. But after some program times, I can not program them. I traced the problem. The micro goes to boot mode with BOOT0 pin ( The main program does not run). but when I send 0x7F, I don't receive the response. I find that the micro does not receive the 0x7F ( when it receive, it will High the TX pin). And I fine the micro receive the 0x7F with oscop.please help

I made an integer Square root function:    int integerSQRT, result,result2;   for (integerSQRT = 0; integerSQRT < 100; integerSQRT++)        if (integerSQRT*integerSQRT >= squaredResult) {                      result = integerSQRT - 1;      // just larger than the sqroot -1 is just less than           integerSQRT = 100;       }   // easily adapted to cube root, quad root etc...

Posted on March 31, 2016 at 16:14I have observed in all of the USB-CDC examples I've seen with the STM32Cube libraries, that the transmit buffer is managed with a timer that polls the USB to see if the previous transmission was complete (or rather if the USB is busy) before setting the next chunk of transmit buffer and calling USBD_CDC_TransmitPacket - Is there a way around having to poll this?  Is there an interrupt available that indicates with a transmit is complete so I know as soon as possible when I can send the next packet?  Or do I have to poll?  If I have to poll, what is a good polling interval to get the best possible performance (FS USB, not HS) #usb #cdc #device #usb-cdc-stm32cube-stm32-polling

Dear Sir/Madam:I have a problem and would need your help. when I write a watchdog like the following:void init(){.. SystemClock_Config(); /*######## Configure watchdog timer ############################*/ // Watchdog clock is LSI, runs at 32kHz. The below settings give // a max watchdog period of 4 sec before reset. WDHandle.Instance = IWDG; WDHandle.Init.Prescaler = IWDG_PRESCALER_256; WDHandle.Init.Reload = 511;  HAL_IWDG_Init(&WDHandle); HAL_IWDG_Start(&WDHandle);}in the main loop functionint main(){...while(1){HAL_IWDG_Refresh(&WDHandle);func1();func2();....}// while}sometimes, whatdog reset happen, I do not know which func cause the watchdog problem.my question is:whether am I correct for the usage of watchdog?how could I find which one cause watchdog reset?is there any watchdog interrupt, once the watchdog reset, this interrupt routine give/print some cause before the system reset?thanks for your helproseanne

I've posted a request to the support board https://my.st.com/ols more than a month ago. No one answered. What's going there? Does anyone read these requests?Thanks,Pavel A.

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Morning everyone,I'm trying to reconfigure a timer configuration that generates dma requests.The DMA request, moves data from the GPIO pins to memory, so peripheral to memory. Currently I have two timers cascaded, the one(being timer 8 is fed with an external clock) and produces a waveform when it is triggered. It outputs this waveform, which is then fed to timer 1 which is in input capture and generates the DMA requests.This seems wasteful as the time it takes to toggle the pin and generate the DMA request from cascaded timers slows down the process.To improve this, I'd like to only use timer 8 in output capture(no output mode) to trigger the dma whenever the counter overflows.Here is the current timer 8 configuration: static void MX_TIM8_Init(void) {     TIM_ClockConfigTypeDef sClockSourceConfig;   TIM_SlaveConfigTypeDef sSlaveConfig;   TIM_MasterConfigTypeDef sMasterConfig;   TIM_OC_InitTypeDef sConfigOC;   TIM_BreakDeadTimeConfigTypeDef sBreakDead

Posted on June 22, 2018 at 01:40I'm wary about assuming anything that doesn't have a firm specification and the V_EH pin seems to have very little information about it.1) The datasheet says 'When the Energy harvesting mode is disabled or the RF field strength is not sufficient, the energy harvesting analog voltage output V_EH is in High-Z state.' What is the specification associated with this High-Z state? Specifically what is the reverse leakage?2) I cannot see any specification associated with V_EH output voltage vs current characterisitcs. Do they exist? I apreciate it will be a function of the RF field. What is the unloaded voltage on the pin?Is this the best IC for the job?Any assistance would be greatly appreciated.

Posted on July 06, 2018 at 13:47I use Rowley (personal favorite), IAR and Atollic depending on the customer's requirements.  I have a project which I am trying to work on now in Atollic.  I have in Atollic the STM32CubeMX perspective version 4.25.  Outside for the other environments, I have upgraded to 4.26, and have worked on a project there which I now need to put into Atollic.  I am forced right now to work on it in the stand-alone STM32CubeMX, because the upgrader in Atollic is telling me that I have the latest version. but when trying to load the project complains that it was made with a newer version and to please upgrade first.#stm32cubemx. #atollic-truestudio-windows

Hello!​I try to print message from my Nucleo-L152RE board by USART2 to PuTTY, but see only black screen without symbols. On other side, my Windows 10 see Virtual COM and I can to burn the code to Nucleo board from EWARM​. What I must to do to solve this problem ?​M​y regards,Maksim​

Posted on June 22, 2018 at 21:13Hey Guys,I have a problem using the CAN1 and CAN2 in dual use on the STM32F2427ZIT6 (custom board).Hereby CAN1 is configured for FIFO0 Interrupt and,CAN2 is configured for FIFO1 interrupt.I managed to transmit and receive frames via CAN1. Also I manged to transmit frames with CAN2.Furthermore if I send frames with the correct filter ID to CAN2 it does arrive in the FIFO1 memory.(I can see it in the hcan2 handler instance with the RF1R bit switch to 1. Also I do see the frame data in the sFIFOMailbox[1] in the RDLR and RDHR fields.)The problem is that the HAL_CAN_RxFifo1MsgPendingCallback is not called. Whereas when I use CAN1 the HAL_CAN_RxFifo0MsgPendingCallback works fine. So because I do receive the frame in the FIFO I think the filter settings are correct. Also the new firmware automatically is assigning the CAN1 handler for the filter settings in the ConfigFilter function.Firmware version 1.21. is used.my can_init function:void Com::init_can(interf

Hello everyone. I'm studying Stm32 and just starting with kit Stm32f746g disco. I'd like to download Standard peripheral libraries. But I don't see any information about Std libraries for F7xx in google. So I'd like to ask you: have or have not Std libraries for F7xx? But not, what libaries can i use intead of HAL. I don't want to use HAL libaries which creative from STM32Cube. Thank you so much. 

Hi,I have a tracking project based on GPS.Could you please suggest me a GPS module that has a library for any STM32L1 MCU?Best regards.

Posted on July 11, 2018 at 22:34Trying to replicate the functionality of the project example for FatFs_uSD_DMA_RTOS on the STM32H743I_Eval board using CubeMX I have run into the next layer of problems, this one involves the SDMMC clock.  There is none!In the project example from the repository STM32Cube_FW_H7_V1.2.0, I noticed the initialization for the SDMMC clock is missing and yet the example works.  The PLL and bus clock dividers are setup but nothing is done for the peripheral clocks like what happens inside the CubeMX generated code.So the question becomes what is the default state if no initialization is done for the peripheral clocks?  In particular, what happens to the SDMMC clock mux if PeriphClkInitStruct.PeriphClockSelection = ...|RCC_PERIPHCLK_SDMMC|... does not occur and no source is set like:PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL2;which I copied from the CubeMX code?I read somewhere else on the forum regarding PPL2 cannot be driv

Posted on June 14, 2018 at 12:50Hello ST25 community.Some weeks ago I wrote this thread:https://community.st.com/0D50X00009XkWIeSANI got the coding as in the example and it works. (The bytes are coded as it is mentioned in ISO 15693 datasheet)I want to use 1 out of 4 coding for transmit from VCD to VICC:Following register settings are used:Defined: MSB to LSB ( 7 to 0 )*-----------------------------------------------------------------------------------------------------------**register settings for iso15693*Mode Definition Register                         (0x03)     : 0 1 1 1 0 0 0 0 - sub carrier stream modeBit Rate Definition Register                     (0x04)     : 0 0 1 0 0 0 1 0 - bit rate fc/32Stream Mo