STM32L4: Strange beheviour SPI rx and DMA

[Paolo Andreuzza]

Hallo.

I'm using SPI and DMA on a STM32L433, to receive data from an external board, and I would like that an interrupt was fired at reception of the 4th byte.

I've set the SPI3 (that is in slave receive only mode because I'm using MISO pin for other things) to trigger the DMA2 channel 1 at reception, as shown in the attached images.

The problem is that when I send the 4 bytes pachet (I've seen the 4 bytes by a scope connected to SCKL and MOSI pin), the interrupt is not fired.

The strange thing is that even if the dma request bit in SPI peripheral is set (RXDMAEN bit in CR2 Register), the last byte received is waiting in the spi rx fifo (FRLVL bits in SR register) and is not moved by dma, infact the dma transfers counter (CNDTR1 register) says that 1 more byte is needed to complete the transfer and finally, firing the interrupt!

The question is why the last byte received by SPI stays in the SPI receive buffer and is not transferred by DMA to memory destination?

Ideas?

DmaSettingsPre and SpiSettingsPre shows the situation before sending the 4 bytes.

DmaSettingsPost and SpiSettingsPost shows the situation after 4 bytes have been sent to the uC.

Thank you in advance.

Paolo

[waclawek.jan]

SPIx_CR2.LDMA_RX ?

[EDIT] SPIx_CR2.FRXTH ?

JW

[Paolo Andreuzza]

Thank you!

Setting SPIx_CR2.FRXTH to 1 solve the issue.

In this way, the RXNE bit, that triggers the DMA transfer, is set every byte received by the SPI and not every two (word size).