LSM6DSV80X FIFO quaternion output always shows X=0, but raw register read is correct I’m trying to read the 3-component “game rotation” quaternion out of the LSM6DSV80X’s FIFO, but every time I pop a FIFO record I get three half-precision floats [x,y,z] where x is always zero and y,z look plausible. When I read the same fusion engine registers directly (not via FIFO), I get a full four-component quaternion [w,x,y,z] where x is nonzero—as expected. Ive connected the STEVAL-MKI247A to my ESP 32 via SPI with the following configuration // Define SPI pins
#define CS_PIN 5 // Chip Select pin
#define SCK_PIN 18 // SPI Clock pin
#define INT_PIN 25 // Interrupt pin
#define MOSI_PIN 23 // Master Out Slave In pin
#define MISO_PIN 19 // Master In Slave Out pinWhat ive done: Enabled the SF-LP game rotation vector and timestamp in the embedded-function bank, thenConfigured FIFO streaming mode and set watermark = 1, andIn loop() I parse the data from the FIFO queue and immediately compare it with the raw register read. 1. How i enabled SF-LP FIFO batching:fifo_sf
