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BlueNRG-M2SP Device gets stuck at hci_tl_lowlevel_isr function

KKurt.1
Associate II

‎2020-11-12 12:32 PM

So I am trying to use BlueNRG M2SP device on a custom board. To use this device i tried to use BLE2 cube expansion with SampleApp application. I am sure i am configuring SPI and GPIO pins correctly. Project builds and loads fine but after booting, code gets in to a loop at here.

void hci_tl_lowlevel_isr(void)
{
  /* Call hci_notify_asynch_evt() */
  while(IsDataAvailable())
  {
    hci_notify_asynch_evt(NULL);
  }
 
  /* USER CODE BEGIN hci_tl_lowlevel_isr */
 
  /* USER CODE END hci_tl_lowlevel_isr */
}

I tried to comment out this section of the code just to see what happens, and BLE doesnt get initiated correctly if i do that.

I will be glad if someone can be helpfull.

Koksal

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4 REPLIES 4
BLin.3
Associate II

‎2020-11-18 5:42 PM

@Köksal Kurt​ Any updates on this?

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KKurt.1
Associate II

‎2020-11-19 1:38 AM

@BLin.3​   Yeah i managed the solve the problem. Firstly you have to upload correct firmware for BNRG device. It can be done using BlueNRG Flasher utility.

Also in my PCB i was using DIO1 pin for CS line. But that was wrong. CS pin should always be DIO11 pin.

Those fixes solved my issue.

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BLin.3
Associate II

‎2020-11-19 7:08 AM

@Köksal Kurt​ thanks for the reply! When you said correct firmware, did you mean the DTM_SPI firmware?

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Wingunder
Associate III

‎2020-12-22 1:45 AM

Hi KKurt.1,

I had the same problem, and it turned out to be a interrupt pin miss-configuration.

Refer to the following schematic:

https://www.st.com/content/ccc/resource/technical/layouts_and_diagrams/schematic_pack/group1/71/cf/2c/3a/24/07/42/7b/X-NUCLEO-BNRG2A1_SCHEMATIC/files/x-nucleo-bnrg2a1_schematic.pdf/jcr:content/translations/en.x-nucleo-bnrg2a1_schematic.pdf

The PA0_SPI_IRQ must be wired correctly to your host-processor.

If you are using the X-NUCLEO-BNRG2A1, then it is important to note that the board was populated with:

  1. PA0_SPI_IRQ_PB14_BNRG1BOOT connected to PA0, with R85 (0 Ohm)
  2. PA0_SPI_IRQ_PB14_BNRG1BOOT connected to PB14, with R82 (0 Ohm)

Unfortunately PB14 is also the JTAG CLK (SWCLK)! This means that you'll have no chance to try and debug your host-processor's application unless you remove PB14. So, take care. I have no idea why the designers of this board populated R82. A possible explanation could be that there was a manufacturing mix-up and R82 got populated, instead of R117.

So, in short: Remove the 0 Ohm resistor from R82 and solder it to R117.

Now, you should be able to debug with SWCLK and if your PA0's interrupt is enabled in the host-processor's software, it should just work.

Regards

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