How to connect and debug Cortex-A7 cores on STM32MP157C-DK2?

[Bao Son Le]

Hello,

Just curious​, I wonder how to connect and debug Cortex-A7 cores on STM32MP157C-DK2?

Currently, I'm using ​CubeIDE and seems that using ST-Link onboard to debug M4 core and can't do same thing with A7 cores, even I saw it's listed in ST-Link debug configuration.

I also see that it's no way to connect this board to an external debug probe.

Thanks for your support​.

[mleo]

Hello,

Following description of setup of debug session uses ethernet connection, so as a first step obtain ip adress of DK2 (eth0 or usb0 in case of ethernet via usb).

Setup a new SSH session

Windows > Show View > Other > Connections

The connection name will used later in debug session, host ip is the one obtained earlier, both User and password is root

Then start debug configuration:

As connection use previous one,

And path on DK2, where your code will be placed and debugged

As last step insert path to GDB debugger

( in SDK in developer package), e.g. /home/osboxes/STM32MPU_workspace/STM32MP15-Ecosystem-v1.2.0/Developer-Package/SDK/sysroots/x86_64-ostl_sdk-linux/usr/bin/arm-ostl-linux-gnueabi/arm-ostl-linux-gnueabi-gdb

GDB command file leave as it is

Now it's all done, Debug!

Best regards,

Milan

[Bao Son Le]

Hello Milan​,

Thanks for your answer. Perhaps I did not describe my purpose clearly.

I'm seeing your answer is focused on establish a debug session for a Linux application.

But, I wanna know how to programming and debug Cortex A7s like bare metal :smiling_face_with_smiling_eyes:(may be in Engineer Mode).

Can I do that now and/or will STM32CubeIDE be ​supported the feature in future?

Thanks,

Bao Son.​

[mleo]

Hello Bao Son,

In engineering mode only M4 core is running - so no issue bare-metal debugging on this core.

Bit I'm still missing point your point about bare-metal of A7 core.

Did you go throu this page?

https://wiki.st.com/stm32mpu/wiki/GDB

Or you mean you want to run your code on A7 without Linux?

Thanks for clarification

Milan

[Genadi Zawidowski]

Hello.

If you use J-Link and bare-metal environment - A7 core debugging is work (with few strange effects like all pins toggle in my case).

r7s7... - is a start-up code name from Renesas A9 processor with enough functionality.

ST-Link can not help in this job.

NOTE: memory addresses on picture are wrong for loader, only one value valid for region start -

0x2FFC2500. I am stops on this problem around half of month

MEMORY
{
  FLASH (rx) 	: ORIGIN = 0x70000000, LENGTH = 4M		/* W25Q32FVZPIG */
  DDR3 (rwx) 	: ORIGIN = 0xC0000000, LENGTH = 256M 	/* DDR3 single chip NT5CC128M16IP-DI */
  RAM (rwx)	: ORIGIN = 0x2FFC2500, LENGTH = 0x00039B00	/* SYSRAM - 256k - 16k - 9k - 256 B */
  TTB (rwx)  	: ORIGIN = 0x2FFFC000, LENGTH = 16k		/* last 16 kB SYSRAM for TTB */
 }

  https://community.st.com/s/question/0D50X0000BiDo0fSQC/stm32mp157aab-failed-to-boot-from-nor-qspi-baremetal?t=1575552683743

 Load address is ALWAYS 0x2FFC2400 for FSBL, whatever you put in the header (it is ignored for FSBL).

 Entry point in the header could be anywhere after the header (i.e. 0x2FFC2500) and the end of the SYSRAM

 I recommend to compile your FSBL SW to fit with a region starting from 0x2FFC2500 (with a size of max 247KB minus 256 for header).

 Entry point will depend on your SW startup.s construction, it is not always at the very first address.

[Bao Son Le]

Hello Milan,

Exactly, I mean I want to run code on A7 and debug it without Linux.

Can I do that?

Thank for your reply,

Bao Son.

[Bao Son Le]

Hello Genadi,

Yes, It seems that you are running a bare metal project on A7 core. It's exactly what I want.

But I'm confusing, which type of debug probe is using from you? I see in the picture it's a JLink probe.

Are you using an EV board? Because I'm using a DK2 and can't find the way to connect JLink to the board.

If you worked successful, could you guide me do that, please?

Thank you.

[Genadi Zawidowski]

Hello.

I am use own project with QSPI boot memory.

Initial loading via Altera Blaster, next - trough USB DFU by own boot loader.

Project - SDR radio - located here:

https://github.com/ua1arn/hftrx

Mainly I use only debug prints, less - SWD or JTAG debug over JLink. ST-Link can not help in this job.

Now I try make new board. Both boards are six-layer.

[Bao Son Le]

Hello,

I understand. It's definitely that I need solder an external header to connect to JLink probe.

Thanks for your explanation.

[Genadi Zawidowski]

Not any JLink versions supports SWD debugging of Cortex-A cores. Diagnostics about this are show pop-up message at connection time.