HAL_SRAM_Write_DMA with SSD1289 TFT Driver - buffer size problem

[ColdPixel]

I have 3.2" TFT display with a SSD1289 display driver connected to my Nucleo-F446ZE. I am using the FMC peripheral, and send data to it with the HAL_SRAM_Write_DMA function. All of the code is my own - I am not using any libraries.

HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)

I have no difficulty operating the display so long as the BufferSize is < 22. When the BufferSize is 21 or less (I have tried 21, 20, 19, 18, 16, 15, 12, etc.) it works perfectly, and the TFT display shows exactly what I send to it. But when BufferSize is >= 22, everything goes wrong.

Here is an example of the TFT display, with a BufferSize less than 22. It includes:

1. Fill screen blue
2. Draw green rectangle
3. Draw yellow vertical line
4. Draw green horizontal line

Now, here is the same example with the BufferSize greater than 21:

I should mention that right now I am not using interrupts to pace the Write_DMA calls. In case this was happening because my Writes were being sent before the last one finished, I put a HAL_Delay(100) between Writes and there was no change. So, that does not seem to be the problem.

This is my FMC configuration. I chose the timing parameters based on the best information I could find online, including a white paper from ST which provided some equations. I have also experimented with making them longer and shorter.

  FMC_NORSRAM_TimingTypeDef Timing;
 
  /** Perform the SRAM1 memory initialization sequence
  */
  hsram1.Instance = FMC_NORSRAM_DEVICE;
  hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
  /* hsram1.Init */
  hsram1.Init.NSBank = FMC_NORSRAM_BANK1;
  hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
  hsram1.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
  hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
  hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
  hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
  hsram1.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
  hsram1.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
  hsram1.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
  hsram1.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
  hsram1.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
  hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
  hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
  hsram1.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE;
  hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE;
  hsram1.hdma = &hdma_memtomem_dma2_stream0;
  /* Timing */
  Timing.AddressSetupTime = 7;
  Timing.AddressHoldTime = 0;
  Timing.DataSetupTime = 9;
  Timing.BusTurnAroundDuration = 0;
  Timing.CLKDivision = 0;
  Timing.DataLatency = 0;
  Timing.AccessMode = FMC_ACCESS_MODE_A;
  /* ExtTiming */

Any thoughts?

Thanks,

~Nick.