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Hello,I dont understand in the AN4776, page 66 the following: /****** Master mode configuration: Trigger update mode *******/ /* Trigger of TIM2 Update into TIM1 Slave */TIM1->CR2 &= ~ TIM_CR2_MMS;TIM2->CR2 |= TIM_TRGO_UPDATE; why TIM1? there should have to mask the TIM2 master settings, before setting TRGO update, or i mistake? Moreover the TIM1 have been already set and active.

Hi all, i am just trying to figure out how to connect the Stwinbox board with Rs485. if you have any advice in terms of applications i must use and the recommended firmware?  regards

I have followed the following guide step by step (Except using the NUCLEO-H755ZI-Q board which I have): I have copied the exact launch.json used in the guide, as well as ran the Project Setup as described in the guide. I also selected “DualCore_Debug” as debug configuration. When I start to debug the code the following error occurs pretty much instantly:bound doStepSettingsValidation Failed: Device not found: run "Setup STM32Cube project(s)" command or set "deviceName"attributeWhen clicking any of the two buttons the same error pops up a second time, I suspect that’s because of the two cores, but that’s only a guess.When connecting the NUCLEO-board it is being detected by the operating system and is also listed under “STM32CUBE DEVICES AND BOARDS”:NUCLEO-Board being detected by VS Code/STM32CubeIDEWhen I re-run the Project setup I see the Projects correctly assigned to each core, although for the M7 another project has been automatically added, which I did not add myself:Porjects being

The SPC563M64L5 does not have an inbuilt SHE module. I need to perform cryptographic functions for one of my applications running on this controller.Could anyone let me know if a cryptographic library is available for the SPC563M64L5? If so, where can I find it?

I'm trying to disconnect a ethernet cable after flashing a code Then I'm getting [00:01:50.522,000] <err> net_tcp: net_send_data()[00:01:52.200,000] <wrn> net_if: iface 1 is down[00:01:52.200,000] <err> net_tcp: net_send_data()[00:01:52.480,000] <wrn> net_if: iface 1 is down[00:01:52.480,000] <err> net_tcp: net_send_data()[00:01:52.900,000] <wrn> net_if: iface 1 is down[00:01:52.900,000] <err> net_tcp: net_send_data()[00:01:53.530,000] <wrn> net_if: iface 1 is down[00:01:53.530,000] <err> net_tcp: net_send_data()[00:01:54.475,000] <wrn> net_if: iface 1 is downThis is expected since trying to connect it backWhen I reconnect ethernet cable Im getting an below error [00:01:54.475,000] <wrn> net_if: iface 1 is down[00:01:54.475,000] <err> net_tcp: net_send_data()[00:01:55.282,000] <inf> phy_mii: PHY (0) Link speed 100 Mb, full duplex[00:01:56.212,000] <err> os: ***** USAGE FAULT *****[00

Hi ST Team,I am trying to enable Bluetooth LE Privacy (Resolvable Private Address) on an STM32WB55CG.EnvironmentMCU: STM32WB55CG STM32CubeWB Package: v1.23.0 BLE Stack: v1.23.0.3 FUS: v1.2.0.0What I changedI changed the address type from: #define CFG_BLE_ADDRESS_TYPE PUBLIC_ADDRto #define CFG_BLE_ADDRESS_TYPE RESOLVABLE_PRIVATE_ADDRThe generated code calls: aci_gap_init( role, 2, ...);and aci_gap_set_discoverable( ... RESOLVABLE_PRIVATE_ADDR, ...);Initially, aci_gap_set_authentication_requirement() was also using CFG_BLE_ADDRESS_TYPE as the Identity Address Type. I found an ST forum discussion mentioning this is incorrect, so I changed it to: aci_gap_set_authentication_requirement( ... PUBLIC_ADDR);However, the behavior did not change.Observed behaviorWith CFG_BLE_ADDRESS_TYPE = PUBLIC_ADDRPairing succeeds. Device works normally.With CFG_BLE_ADDRESS_TYPE = RESOLVABLE_PRIVATE_ADDRConnection is established. Pairing fails. ACI_GAP_PAIRING_COMPLETE_VSEVT_CODE

Dear team, hello, I've drawn a power supply circuit diagram for the STM32F051R8T6 but I'm a little hesitant. The diagram of my circuit is below. Have I done it correctly? Thank you for your answer. 

Hello, I have an STM32H573 project with TrustZone enabled. After the CPU goes into non-secure mode and during execution of the HAL_Init() function (more specifics below) a hard fault occurs. There is only a hard fault during the execution from a non-secure state. In the secure state (at boot) the HAL_Init() function successfully runs. Is there a configuration for the RCC not enabled by default that I a missing, allowing it to be accessed by both Secure and Non-Secure CPU states?Within GTZC_S TZSC - Privilegeable peripherals I cannot enable it. I see no relevant settings (I have tested a few that might be loosely related but no solved) in RCC. In the code below I have used an arrow (<--) to denote exactly where the hard fault occurs (Verified with debugger)Non-Secure Entry Code (CubeMX Generated):int main(void){ /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* MPU Configuration-------------------------

Hi team,I am working on a firmware upgrade implementation using the ST25DV04KC NFC tag in FTM (Fast Transfer Mode).I have successfully ported the ST25FTM library to my target microcontroller. Basic commands and demos—such as checking the board version and sending passwords—work consistently.However, I am experiencing a severe reliability issue with the actual Firmware Upgrade process. The upgrade fails roughly 90% of the time. It only succeeds occasionally (~10% success rate). The target 8 Bit PIC18 microcontroller.I have attached the console log of a failed session below for reference. Could you please help me identify what might be causing these frequent failures, or let me know if you need any additional logs or hardware details from my side? Thanks.Console Logs:Jul 09, 2026 8:49:50 AM com.st.st25sdk.STLog i INFO: mState = PREPARE_PACKET Jul 09, 2026 8:49:50 AM com.st.st25sdk.STLog i INFO: sendNextPacket Jul 09, 2026 8:49:50 AM com.st.st25sdk.STLog i INFO: preparePacket Jul 09, 2026

I am using STM32MP157C with kernel version 6.6, and the problem I am currently experiencing is that HDMI cannot display. The hardware design uses SII9022ACNU chip, and the driver keeps reporting probe failure with a return value of -11. The SII9022 HDMI chip does not respond to I2C communication on the 6.6 kernel, and manually resetting GPIO is also ineffective. Have you encountered similar problems and how have they been resolved。

Hello, I may be missing something, I cant generate the SPI_init() method within main() (also pins are yellow ?)…I have generated;  HAL_Init(); /* Configure the system clock */ SystemClock_Config(); /* Initialize all configured peripherals */ MX_GPIO_Init(); Cheers

Hello,I have completed this guide successfully:How to integrate TouchGFX and camera middleware on an STM32N6570-DK However, I am running into an issue when I try to add SDMMC2 or ETH in the .ioc.  After I generate code then build in the IDE, I get the below error: C://TouchGFXProjects/VisionControlboard2/FSBL/Core/Src/main.c:334:(.text.startup.main+0x12c): undefined reference to `HAL_SD_Init'C:/ST/STM32CubeIDE_2.0.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/bin/ld.exe: (HAL_SD_Init): Unknown destination type (ARM/Thumb) in ./Application/User/Core/main.oC://TouchGFXProjects/VisionControlboard2/FSBL/Core/Src/main.c:334:(.text.startup.main+0x12c): dangerous relocation: unsupported relocationProject in link below:https://app.box.com/s/bdbyzi5eqvqhgib90klxgehmhs8pkynsWhat is the best method to get this resolved?  I am using STM32CubeIDE Version 2.1.1

Hi everyone,I'm using STM32 Cube Programmer CLI to port an SBSFU example to STM32U5G9 platform (from U585). Other than shell script mess and no IOC files in this examples, I've managed to port the example and run it by using ST Link programmer under both Linux and Windows.The problem is that the newest release 2.20 has its J-Link functionality completely broken in Linux (I'm using Kubuntu 22.04 and 24.04, also tested in regular Ubuntu). Any command to STM32_cube_programmer_CLI ends up with:Error: Could not connect to the J-Link/Flasher, Library not found !The underlying issue is that libjlinkarm.so is not linked to the CLI executable: ldd shows it's linked for older versions, but no linkage for v2.20. I'm guessing this has happened since ST was finally moving away from weird versioned so names to non-versioned so's: i.e. libjlinkarm.so.7 -> libjlinkarm.soI'm hoping that someone from ST will read this message since the issue is not possible to resolve without re-linking... So @s

Hello,I downloaded the latest version of STM32CubeMX, but I am still facing this issue. Sometimes it shows "Connected to HTTP server", but after that I get the following error:Error downloading the following files:stm32cube_fw_f1_v187.zipCould you please help me resolve this issue?

I have to deploy the STM32CubeProg in an big network.I’ve tried the silent installation, and I’m stuck with:Error: unable to find or load main class com.st.app.MainCaused by: java.lang.NoClassDefFoundError: javafx/application/Application"There is as solution inbundled-java-runtime-missing-or-corruptedIm replaced installer to C:\Program Files\Java and rename folder "jre _1.8***" to simple "jre" and it works for me. Hope it will help you too.  This is not really the solution, or? Is there a clean way for a silent Installation?The version is:2.22.0

Hi,I would like to ask whether support for the STM32C5 family is planned in the STM32 Motor Control SDK (MC-SDK).If so, could you please provide an indication of the expected release timeframe or roadmap for its integration?We are currently evaluating STM32 devices for a motor control application and would like to understand whether STM32C5 family will be officially supported by the MC-SDK in the near future.Thank you in advance for your support.Best Regards

Hi,we have a question regarding the Secure Manager Internal Trusted Storage size on the STM32H73 series.We have configured the following options:external flash profile 0 secure modules (=SMAK_0 ?)According to UM3254 it is our understanding the ITS size can now be up to 56 Kbyte:Our application project.py prebuild seems to extract value “9”, which means 9 * 8 Kbyte (Flash sector size) = 72 Kbyte? Jul  8 13:27:10 2026 : [INF] Searching the parameter with <Name>ITS size</Name> element2026-07-08 13:27:10,542 - DEBUG - Wed Jul  8 13:27:10 2026 : [INF] Parameter found. Verifying information of '<Value>0x9</Value>'2026-07-08 13:27:10,543 - DEBUG - Wed Jul  8 13:27:10 2026 : [INF] The modification is not necessary2026-07-08 13:27:10,543 - DEBUG - Wed Jul  8 13:27:10 2026 : [INF] The tag <Value> has already the correct content (0x9) Is there a misunderstanding on our end about the profile, memory configuration, UM3254 table, the prebuild proccess or the conversion

Hi everyone,I am new to the MCSDK environment and currently working on a porting project from MCSDK 5.4.8 to 6.4.1. I have been stuck on this for weeks and I am honestly getting desperate as I cannot find a way forward.I need a functional routine to handle encoder alignment that is compatible with the 6.4.1 framework. The alignment must be performed solely upon user request, and it is critical that the motor does not start running after the alignment sequence. I am looking for a direct replacement for the legacy MCAlignEncoderMotor1() API.I have already attempted the implementation suggested in this thread: MCSDK 6.3 - Correct way to restart / retrigger encoder alignmentUnfortunately, this solution does not work for my setup. Could you please provide guidance on how to trigger this alignment in isolation within the 6.4.1 architecture?Best regards,bolla_bo

Hello,I am working on a design incorporating the STM32U3C5CIU6Q in SMPS mode. This package includes two VDD11 pins. I am having trouble interpreting the datasheet when it comes to the number of inductors I will need. This note under Figure 24 in the datasheet is clear that each pin will need a capacitor to VSSSMPS, but it seems like it could also imply that each VDD11 pin requires its own inductor between VLXSMPS.The power supply scheme (with SMPS) is also not clear to me: This section seems more like it is expecting a single inductor:Am I okay to use a single inductor between the VLXSMPS pin and VD11 node, with each VD11 pin having its own capacitors, or should I treat each VD11 as a separate loop with its own inductor as well?Thanks for any help!

NUCLEOWB55RG I set I2C3 in MX. I have 2 x temp sensors & 2 x accelerometers in the bus./* Snippets of code to show how I2C3 is set up & used */#include "main.h"#include "adt7410.h"#include "adxl345.h"I2C_HandleTypeDef hi2c3;ADT7410 temp_0;ADT7410 temp_1;ADXL345 acc_0;ADXL345 acc_1;static void MX_GPIO_Init(void);static void MX_I2C3_Init(void);int main(void){ HAL_Init(); MX_GPIO_Init(); MX_I2C3_Init(); /* ADT7410 set up */ /* temp_0 at 0x48 * temp_1 at 0x49 */ temp_0.adti2c = &hi2c3; // I2C Handler ADT7410_Init(&temp_0, 0x48); // I2C address depends of A0 and A1 pins ADT7410_Reset(&temp_0); // Optional ADT7410_SetResolution(&temp_0, ADT7410_16BITS); // Put the device in 16 bits resolution temp_1.adti2c = &hi2c3; // I2C Handler ADT7410_Init(&temp_1, 0x49); // I2C address depends of A0 and A1 pins ADT7410_Reset(&temp_1); // Optional ADT7410_SetResolution(&temp_1, ADT7410_16BITS); // Put the

If I copy the MCU part number from the NUCLEO-C5A3ZG Product Page and paste into CubeMX2, it gets a trailing space - and says “No available options”: Removing that space does then give a list of 2 devices: It really should be able to cope with trimming whitespace from the input box!

Firmware Package: STM32Cube_FW_H5_V1.6.0 Product ProblemDA regression fails with timeout. I cannot recover the board. I was trying to run the STiROT Template example (STiROT_Appli) on the STM32H573I-DK board. 1. I ran a custom provisioning script (based on ob_flash_programming.sh + obkey_provisioning.sh)2. During image flashing step, I accidentally flashed an unsigned binary (appli.bin) instead of the signed image (appli_init_sign.hex)3. OBKey provisioning (DA_Config.obk, STiRoT_Config.obk, STiRoT_Data.obk) may have failed due to the MCU being in an unstable state4. I then set Product State to PROVISIONED (0x2E) Discovery output Discovery succeeds and shows- PSA lifecycle: ST_LIFECYCLE_IROT_PROVISIONED - ST provisioning integrity status: 0xf5f5f5f5 - ST HDPL1 status: 0x1 - Permission: Full Regression is listed as available Regression attempt Using default keys from the firmware package (not regenerated): - Key: DA/Keys/key_3_leaf.pem - Certificate: DA/Certifica

In RM0481 rev 4 April 2025 I find the following text:7.6.8 Write protectionA write-protected group of sectors cannot be erased nor programmed. As a result, a bankerase cannot be performed if one group of sectors is write-protected, unless a NVSTATEtransition to OPEN is triggered (erasing the whole user flash memory). It is not clear what NVSTATE is in this context. Is this a left-over from documentation of a different MCU? I don’t think it is PRODUCT_STATE. Because to my understanding you can have a PRODUCT_STATE > OPEN and not enable TrustZone and then write to FLASH_WRP1R_PRG to turn off write protection - you should be able to do a bank erase on bank 1. You can set initial values with an OB but I can’t see any documentation that this also makes changing FLASH_WRP1R_PRG illegal and the relevant OBs are not protected by PRODUCT_STATE the same way as e.g. SECWM and HDP.Same reasoning for flash bank 2.And if you enable TrustZone, it is stated that FLASH_WRP[1, 2]R_PRG is non-secure.

Hello ST Community,I am evaluating the security features of the STM32H733 (Cortex-M7) for a project that uses:A custom bootloader stored in internal flash The main application stored and executed from external QSPI/Octo-SPI flashI have the following questions regarding Secure Firmware Install (SFI):Is SFI for internal flash officially supported on the STM32H733? (I saw it was added in AN4992 Rev 8, but I would like official confirmation.) Is SFI for external flash (SFIx) supported on the STM32H733? Specifically, can the secure bootloader (RSS) decrypt and program the external application image securely during manufacturing, or is only the "host-side encryption + internal firmware configures OTFDEC" method available? If external SFIx is not supported, what is the recommended secure manufacturing flow for a design with main code in external flash?

Hi.I’m working on a custom board with a C551VET6 and trained on a NUCLEO_C562RE with ADC. I attempted the conversion in polling mode in several ways (mode=single + discountinuous=disabled  /  mode=continuous + discountinuous=3ranks) by varying the implementation of the FOR loop (including or excluding the calls to HAL_ADC_REG_StartConv and HAL_ADC_REG_PollForConv according to the selected mode); no matter what I did, as soon as I needed to convert 3 or more channels, only the first two showed distinct values, while all the other channels in the sequencer returned a value identical to that of the second channel.I found no example using more than 2 channels in a basic regular sequencer. Have you tried it at ST ?By the way, I’m working with a CTN temperature sensor and two HDC3120 giving both temperature and humidity, thus 5 channels in my case.Do I need to lower the resolution or something when the number of channel increases ?I’m not familiar with ST community mechanisms, shall I open a