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Hi,how do I start the USB DFU Bootloader with a STM32C071 Nucleo? I tried it while putting Boot0 to high and pressing reset or do a power cycle but the STM32 DFU does not show up in the device manager. I connected USB to the NUCLEO extra USB port of the C071. I tried with another board (F2 MCU) where it worked well to prove that the drivers are installed. BRMatthias
When attempting to connect and flash an STM32F407G-DISC1 board with STM32CubeProgrammer via the default ROM USART1 interface on pins PA9 (TX) and PA10 (RX), the connection consistently fails with a timeout error: text Error: Activating device: KO. Please, verify the boot mode configuration and check the serial port configuration. Reset your device then try again.This failure occurs despite proper boot pin configuration (BOOT0 = 3.3V, BOOT1/PB2 = GND) and correct UART settings (Even parity, 8 data bits). In contrast, using PB10 / PB11 (USART3) succeeds immediately. 2. Test Configuration & EnvironmentTarget Device: STM32F407VGT6 (LQFP100 package on STM32F407G-DISC1 board)Programming Tool: STM32CubeProgrammer (UART Interface mode)Serial Bridge: USB-to-UART Adapter (CP2102)Target Pins Tested:PA9 (STM32 USART1_TX →→ Adapter RX)PA10 (STM32 USART1_RX ←← Adapter TX)GND (Common ground)Boot Configuration: BOOT0 = 3.3V, PB2 (BOOT1) = GNDPort Settings Tested: Baudrates: 9600, 57600, 115200 |
From cube 1.3.0 I always get this error and the cause seems to be the path generation in .d files. In cube 1.12.1 the path is relative but from cube 1.3.0 it is absolute and generates something like \\?\C:\.... So the only solution for me is to stay with cube 1.12.0. The build however seems ok an the bin file is generated. Did anyone had a similar issue? The issue is present only on windows and it seems ok on linux.arm-none-eabi-size STM32F769I_TEST.elfarm-none-eabi-objdump -h -S STM32F769I_TEST.elf > "STM32F769I_TEST.list"arm-none-eabi-objcopy -O ihex STM32F769I_TEST.elf "STM32F769I_TEST.hex"arm-none-eabi-objcopy -O binary STM32F769I_TEST.elf "STM32F769I_TEST.bin"text data bss dec hex filename1227608 43680 452264 1723552 1a4ca0 STM32F769I_TEST.elfFinished building: default.size.stdoutFinished building: STM32F769I_TEST.hexFinished building: STM32F769I_TEST.binFinished building: STM32F769I_TEST.listtest/web/unicabminnow.d:1: *** multiple target patterns. Stop.make: *** [makefile
Hi,We have a project with ST25R3916B to read a NFC-B T4T card. This driver works fine.In the same state machine I am adding support for reading a NFC-A card. The `rfalNfcGetActiveDevice` correctly returns RFAL_NFC_LISTEN_TYPE_NFCA and rfalNfcaPollerCheckPresence returns RFAL_ERR_NONE, however rfalNfcaPollerFullCollisionResolution() function is returning a RFAL_ERR_TIMEOUT The Type 4B reader loop has the equivalent functions calls as the Type 4A reader and works fine, but Type 4A is having the abovementioned timeout issues with collision resolution.I am having some issues with attaching a .c file, so I will post the whole function in a comment after the question is published
Hello,I am developing a small standalone wearable emergency device and I am considering the ST87M01-1111 because of its integrated GNSS, NB-IoT connectivity and embedded SIM.According to ST’s documentation, the ST87M01-1111 can be supplied with an embedded Vodafone SIM profile.I would like to clarify a few points before selecting this module:1. Can the embedded Vodafone SIM profile of the ST87M01-1111 connect to a Vodafone NB-IoT network in Turkey?2. Is the embedded Vodafone profile already provisioned/activated, or does the user need to obtain an IoT subscription separately?3. Can an individual developer use this embedded SIM/profile for a small prototype, or is a corporate/IoT agreement required?4. If the Vodafone profile cannot be used in Turkey, can another SGP.32-compatible IoT SIM profile (for example from a global IoT connectivity provider) be provisioned to the ST87M01-1111?5. Is the ST87M01-1111 currently available as a small-quantity/sample purchase, and if not, what is the r
Hi. We are encountering issues whilst the integration of st67w611m1a6u wifi chip to the Stm Nucleo-H753zi board(host) using SPI for communication and UART for debug logs. The Wi-Fi module firmware has been successfully loaded, but the network driver does not initialize on the host. As a result, the module cannot connect to a Wi-Fi network. We would be pleased to receive more clarity on this. The zip file of our project has been attached below and necessary files are also added.Pin connections between st67 wifi chip and nucleo board wifi IC nucleo board VDDIO 3.3v VDD33 3.3v GND GND CHIP_EN PE2 BOOT PE4 SPI_RDY PE3 SPI_CS PA4 SPI_CLK PA5 SPI_MISO PA6 SPI_MOSI PA7 UART_TX PD8 UART_RX PD9
Hello,I am using an STM32H562RGT6 (1 MB Flash) on a custom board.When TrustZone is enabled, the non-secure area of Bank 2 can be programmed successfully, but it cannot be erased sector by sector. The erase operation only works when performing a full mass erase. If I attempt to erase individual sectors, the operation appears to complete without error, but the flash contents remain programmed.My development environment is:STM32CubeIDE 2.2.0 STM32CubeMX 6.18.1 STM32CubeProgrammer 2.23.0I have attached the current Option Bytes configuration.This issue becomes particularly significant during debugging, when updating the non-secure firmware. Since the old contents are not actually erased, the programming operation results in a verify mismatch.I have also noticed some inconsistencies in the flash memory configuration:When enabling TrustZone (TZEN = 0xB4):SECWM1_PEND is automatically set to 0x7F, covering flash up to address 0x080FE000. SECWM2_PSTRT = 0x00 and SECWM2_PEND = 0x7F, covering flas
I'm using JetBrains CLion to debug my STM32 project, and it runs `ST-LINK_gdbserver` when debugging, and passes the "--shared" flag for other STM apps to connect into. It starts up okay, and shows "Info : default port : 7184".I've changed my "settings.js" file in "~/.STMicroelectronics/stm32cubemonitor/" folder so that "connectionType" is "tcp" and not "p2p".I run stm32cubemonitor, and then node-red is showing up an error of: Cannot read properties of undefined (reading 'isTcpAvailable') (line:59)I think this code underneath is all bundled into the distributable, so I can't debug what's actually going wrong.The versions I have installed currently are:ii st-stm32cubeide-2.0.0 2.0.0-26820-20251114-1348-1 amd64 IDE for STM32 ii stm32cubemonitor 1.12.0 amd64 STM32CubeMonitor helps debug a... ii st-stlink-server 2.1.1-1 amd64 stlink tcp server to permit sev...I'm using an ST-Link/V2 ISOLRunning on Ubuntu 25.10. Any ideas how to fix this, or where the source code is for
I have a problem with identifying the sensor type from the marking on the housing. My understanding is the first two digits of the code are how you identify the part, but I could not find a good key to decipher it.The two digit code is “3B”Would it be possible to identify the part number based off this code?
Hi, I have a lot of SVG files in my project, so much so that I had to move them to my external flash. Now, I know I can move SVG files to external flash by adding a section to my linker script: ExtFlashSection : { */SVGDatabase.o(.rodata.*) } >EXT_FLASHHowever it would be simpler to simply set this in TouchGFX Designer itself just like I can choose the location of PNGs.As seen in the image below. I can select a Section for PNGs, but not for SVGs.Is this something that can/will be added to TouchGFX in the future?
Dear Community,Chip: STM32H563IIK6Package: UFBGA(176+25)we are facing an issue where the VREF (+/-) Balls are wrongly connected in the design (VREF+ on GND and VREF- on Vcc). Means the design is not working. We tried a rework to connect the Vref+/- with very tiny wires but this is very complex and the result is most time not working.Is there any chance to let both pins floating, means we do not connect VREF+ and VREF-? This rework we can do easily.Thanks a lotMarwin
Hi everyone,I'm working on a battery-powered flow meter application using the STM32L053, and I'm running into a massive, unexpected jump in power consumption.Previously, our device was successfully hitting the 0.0xx mA (around 30µA) range while maintaining our sleep cycle and keeping the LCD on. However, our boards are now consistently drawing between 5.3mA and 6.0mA, and I am struggling to isolate the leak.Application & Setup Details:MCU: STM32L053 (64-pin) Clocking: LSE is disabled. We are relying entirely on the MSI (262 kHz for run mode) and the LSI (~37 kHz) for the RTC and LCD. Peripherals Active in Sleep: LCD Controller: Driving a large custom 7-segment display (GTD2892B). Configured for 1/4 Duty, 1/3 Bias, running off the internal voltage source (VSEL = 0 or tied to 3.3V). LPTIM1: Running asynchronously in the background on the LSI to count flow pulses via an external op-amp (MCP6042). RTC: Set up with the WakeUp Timer to wake the MCU every 100ms to update the flow math a
I am using the NUCLEO-U575ZI-Q board.In ST32CubeProgrammer, the option byte TZEN is enabled.In this state, when I changed the readout protection level from Level 0 to Level 1, I was no longer able to connect via ST-Link.Please tell me how to recover so that ST-Link connection becomes possible again.
In the STM32H5 series security document, STM32H5F4 is missing from the OEMiRoT + OEMuROT support controller list. Is STM32H5F4 a derivative of STM32H5F5, and does STM32H5F4 have the same security support as STM32H5F5?
We recently added support for STM32C071 to our free, MIT-licensed MicroPython Debugger for VS Code.The interesting part is that the STM32C071 has only 24 KB of RAM and 128 KB of Flash, yet you can still use source-level debugging directly from VS Code.Set a breakpoint in your MicroPython source, press F5, and debug the code running on the actual STM32 MCU.The debugger supports:Breakpoints Step Over / Step Into / Step Out Variable inspection Watch Call Stack Break on exceptions Continue / PauseGitHub: https://github.com/ghi-electronics/micropython-vsc-extensionVS Code Marketplace: https://marketplace.visualstudio.com/items?itemName=ghielectronics.micropython-debuggerFor testing, I used an STM32C071KBU6 running MicroPython with SPI and PWM on a DUELink Holiday Tree: Holiday Tree | DUELinkHere is example source: micropython-vsc-extension/examples/stm32c07/chrismastree_example at main · ghi-electronics/micropython-vsc-extensionI'm interested in hearing from other STM32 + MicroPython users
Hi,I am trying to debug STM32N6 program loaded in external flash. When I started the debugger in the FSBL project I can put a breakpoint just before it jumps into application inside external flash. It is obvious I wont be able to see the symbols since it is not loaded. So I loaded my application elf file under debug_configuration/Startup/Load Image and Symbols (See attached image). When I start my debugging session, I encounter the following error and was unable to debug even FSBL code.Board: STM32N6 DKSTM32CubeIDE: 1.17.0Platform: Windowproject: Template_XIP_FSBL (found under Stcube package for N6).Here is the error:STMicroelectronics ST-LINK GDB server. Version 7.9.0 Copyright (c) 2024, STMicroelectronics. All rights reserved. Starting server with the following options: Persistent Mode : Disabled Logging Level : 1 Listen Port Number : 61234 Status Refresh Delay : 15s Verbose Mode : Disabled SWD Debug : Enabled InitWhile : Enabled Waiting for debugger connection... Debugger c
We're using an STM32F405 as a USB OTG FS Host and need to communicate with a USB-to-serial adapter that uses the CH341 chip.We could not find any official CH341/CH340 driver or class support in STM32Cube packages or example projects.Questions:Can you confirm whether STM32Cube USB Host middleware officially supports CH341/CH340 devices, in any released package (including X-CUBE expansion packages)? If not supported, is there a recommended reference or guidance from ST for implementing a custom USB Host class driver for vendor-specific USB-to-serial chips like CH341, based on the existing USBH_ClassTypeDef interface used by CDC/MSC/HID? Are there any known limitations on STM32F405 USB OTG FS Host mode we should be aware of when implementing a custom class driver (e.g., control transfer handling, endpoint limits)?
LL_ATON_LIB_Concat falls back to 4× memcpy when the concat axis is not leftmost — 32% of a 4 ms real-time budget on STM32N6Hardware: NUCLEO-N657X0-Q (STM32N657X0H3Q), Cortex-M55 @ 800 MHz, Neural-ART. Tools: ST Edge AI Core 4.0, STM32Cube_FW_N6 V1.4.0, STM32CubeIDE 2.1.1. Application: real-time audio, hop = 192 samples @ 48 kHz = 4 ms = 3.2 M cycles, hard deadline, underrun must stay 0.1. Concat falls back to a byte loop, and it is one third of the budgetOur graph is a streaming TCN (int8, L=12, C=88, T=48) run per audio hop with two voices, so the tensor layout has the voice axis leftmost: [C][V][T]. The graph contains 12 Concat blocks (channel-wise taps).Epoch profiling (LL_ATON_EB_DBG_INFO, DWT cycle counter on the M55) showed those 12 blocks costing 1 019 501 cycles per inference — 32% of our entire 4 ms budget. No compiler option changed the number.The cause is in the runtime source: LL_ATON_LIB_Concat takes its fast DMA path only when the concatenation axis is the leftmost signif
Hi,I am trying to flash my STM32U5G9J-DK2 via TouchGFX Run Target button. The mk file returns this error:* STM32CubeProgrammer is not found. Make sure the STM32CubeProgrammer is installed in its default directory. ** You can download it at https://www.st.com/en/development-tools/stm32cubeprog.html * I am 100% sure that STM32CubeProgrammer is installed at the right directory that is required by the mk file.The problem happens even when trying to flash an exemple app after selecting the right demo board in TouchGFX Designer.Anyone encountered this issue?
Hi I would like to clarify the exact behaviour of the BDU function. According to the datasheet and application note, BDU should prevent the output registers from being updated until both the LSB and MSB have been read.After enabling BDU, I repeatedly read only the LSB register without reading the corresponding MSB. However, I receive a new LSB value with each read. This means LSB is getting updated, eventhough the condition of reading both LSB and MSB is not fulfilled. Why acceleration data appears to update even though the corresponding MSB register has not been read?I’m using the following notations to explain better. Time LSB MSB t1 L1 M1 t2 L2 M2 t3 L3 M3 t4 L4 M4 Could you please clarify whether the LSB is allowed to update while the MSB remains frozen? If so, when the MSB is eventually read, should it correspond to the first LSB value or to the latest LSB value? i.e. If i read LSB only 4 times and then read MSB, would it be M1 or M4? Is the BDU behaviou
Hello ST Team,I am evaluating the secure boot and secure firmware update solutions for the STM32H5 family and plan to implement OEMuRoT on an STM32H5F4 device.While reviewing the wiki article OEMiRoT OEMuRoT for STM32H5, I noticed that the STM32H5F4xx is not listed as a supported device family.Security:OEMiRoT OEMuRoT for STM32H5 - stm32mcuI would like clarification on the following points:Is STM32H5F4xx intentionally excluded from OEMuRoT support? Are there any hardware or security-feature limitations in STM32H5F4 that prevent OEMuRoT implementation? My target device is STM32H5F4, and I am planning a secure firmware update architecture based on Root of Trust and authenticated firmware updates. Any guidance or roadmap information would be appreciated. Thank you, RJ
Hi,I'm working on a custom STM32MP157C board with a Microchip LAN8742A PHY (RMII). Originally the board uses an external 50 MHz oscillator that feeds both the PHY and the SoC's PA1 (ETH1_RMII_REF_CLK) — the classic LAN8742A "REF_CLK In Mode" setup, same as ST's reference schematic. That works fine.I'm now trying to get rid of the external oscillator and have the SoC generate the 50 MHz REF_CLK itself instead, using RCC's CLK_ETH_PLL3Q — the setup ST documents in AN5031, Figure 45 ("RCC provides 50 MHz ETH_CLK"). For this test I desoldered the two series resistors that fed the oscillator signal in, isolated the oscillator, and bridged PA1 straight to the PHY's XTAL1/CLKIN through a wire + the same 22 Ω resistor as before. I also added st,eth-ref-clk-sel; to the ethernet node in both the kernel and U-Boot device trees, rebuilt and reflashed.Result: PHY never comes out of reset (phy_poll_reset failed: -110), and an oscilloscope on PA1 shows absolutely nothing — not even a weak or distorte
Hello!on our project that use the SPV1050, we need to charge a small LiPo battery that have a 20mA maximum charging current. Could someone help me find a good solutions for regulate the current from BATT Pin?thanks in advance,Andrea
Hello ST Team,We are evaluating STM32TRUSTEE-SM (Secure Manager) on STM32H5F4 devices and would like clarification regarding the external flash support architecture.From the STM32TRUSTEE-SM documentation and wiki pages, we understand that:Secure Manager provides an External Flash Profile.An External Flash Driver is referenced as part of the Secure Manager configuration flow.External firmware and data confidentiality can be enabled through OTFDEC.OTFDEC-based secure external memory access is described together with the OCTOSPI peripheral.Secure Manager supports firmware download slots located in external flash memory.However, we need clarification on the supported external memory architecture and driver model.Questions1. External Flash Interface Support restricted to memories connected through the OCTOSPI peripheral, or are other external memory interfaces also supported? Specifically, does the External Flash Profile support: Octal SPI NOR Flash, Quad SPI NOR Flash,
How are Phase (raw and degrees) and Amplitude (raw and V) calculated in the Features → Antenna → Antenna Measure section of the ST25R300 Eval GUI?
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