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I got an error when downloading the .sfi file to STM32H753II using the STM32Programmer_CLI, my HSM version is V2AE.The error message is as follows: What its mean?V2AE cannot support STM32H753,and must use HSM_V1?or H753 cannot support SFI ?I’m a new use about SFI.Looking forward to your reply.

Hello All,I have a certain STM32H7 that I can't erase sector 0 using STM32CubeProgrammer.I think it is because PROT_AREA_START1 and PROT_AREA_END1 are not correct. I am trying to get back to default values of PROT_AREA_START1 =0xFF (0x0800ff00)PROT_AREA_END1 = 0x00 (0x080000ff) to disable the protection.However I cant Actually change the option bytes through the programmer. I get:an error: "Expected Value for option byteP: "PROT_AREA_START!: 0xFF, fount 0x00"RDP is level 0 (AA)I am using ST-link. Thanks for any help,Trevor

Hi EveryoneRequesting clarification on one topic:Does STM32U585 have support for PQC algorithm with any software library that has been validated on the same controller, as there is a requirement for PCI PTS 7, that the device should support PQC Algorithm and we need an evidence to show the same for the same controller. On searching XCube-PQC Library supported devices mentions STM32H563ZI only.Requesting confirmation in this regardThanks and RegardsPhilip

Hi everyone,I'm working on an audio acquisition project using the STM32H743ZIT6 microcontroller. The goal is to build a microphone array with 8 digital MEMS microphones (MP34DT05-A), connected via DFSDM and streamed over USB to a PC using the USB Audio Class (UAC). At the moment, I'm starting small and testing with one or two microphones.So far, I have successfully configured one DFSDM filter and one channel using regular conversion with DMA, and I'm receiving valid audio data.Now I would like to add a second microphone, which is connected to a second DFSDM channel (with opposite clock edge). Both channels should ideally be handled by the same DFSDM filter.I'm currently wondering:What is the best approach to sample two channels using a single DFSDM filter?Is it necessary or recommended to use injected conversion for the second channel in this case?How would I properly configure DMA and interrupts if both regular and injected conversions are used?Are there any known working examples for

Hi,I'm trying to get LPBAM Low power timer capture to work in a frequency measurement application. The intention is to use LPBAM to write input captures from LPTIM3 to a buffer in SRAM4 while in Stop mode 2. The app loop just sets a wakeup via the RTC of 500mS, then enters Stop Mode 2. On wakeup, it does a few GPIO read/writes and I2C3 writes amongst other things, then loops,That all works fine, and the system is in Stop Mode 2 95% of the time.LPDMA1 CH0 is enabled in the non-LPBAM IOC configuration editor in Linked-list and circular mode.I've created an LPBAM application/scenario with just one queue, and LPTIM3 channel2 set for input capture clocked by external clock (LSE crystal 32.768KHz).(ScreenShots below)This passes 'CHECK LPBAM DESIGN' in the editor, and generates code without errors.I've then added the LPBAM init/build/link/start calls to main before the main loop starts:/* LPT3App application initialization */MX_LPT3App_Init();/* LPT3App application LPT3Sce

Hello, I am trying to load a kernel driver (.ko file) for a MIPI camera I would like to use with the STM32MP257F-DK. It's for the imx664, and no driver is present already. I have the source for the driver, and was able to compile it into a .ko file, cross-compiled with the exact same OS as is present on the board and with the SDK set up as required. The vermagic line matches exactly: vermagic: 6.6.78 SMP preempt mod_unload aarch64However, every time I try and load the driver with insmod, with or without -f, I get the error: insmod: ERROR: could not insert module imx664.ko: Invalid module formatI am struggling to find where the incompatibility could be, since I have re-tried it a few times and been careful to set it up as ST's documentation says and also to match what is expected by the board. Is there something I am missing with this?

We develop a measuring device which should be capable of SIL 2. It would be possible to fall back to SIL 1 only. STM32F4 MCU is used with STL-Safety-Library.Has anybody qualified the gcc for that? Or did you replace the compiler by already qualified products from Keil, IAR?If you have qualified the gcc, have you done it yourself or used commercial tools?

I am porting the ST67W611M1 WiFi/BLE driver (X-CUBE-ST67W61 v1.2.0) from a NUCLEO-U575ZI-Q to a custom PCB with STM32F767VIT6. The Nucleo version works perfectly. On the F767 custom board, W6X_Init() hangs indefinitely.HARDWARE- Host MCU: STM32F767VIT6 (216MHz, Cortex-M7)- WiFi module: ST67W611M1 (NCP firmware: mission_t01_v2.0.97.bin — confirmed flashed and verified)- SPI2: PB12=NSS(SW), PB13=SCK, PB14=MISO, PB15=MOSI- CHIP_EN: PD4, SPI_RDY: PD7 (EXTI rising+falling, NVIC enabled)- DMA1 Stream3 (RX, CH0), Stream4 (TX, CH0)- FreeRTOS heap: 102400, configMAX_PRIORITIES: 56- LOW_POWER_MODE: disabled, W6X_CLOCK_MODE: 1 (internal RC)SYMPTOMSPuTTY output stops at:W6X_Init...[hangs forever]W6X_Init() never returns. The FreeRTOS task blocks on sem_if_ready permanently.DEBUG FINDINGSI added debug prints to spi_port_transfer_dma() to log RX buffer contents. Here is what the module sends during init:RX[0]=0D [1]=0A [2]=72 len=12 → "\r\nr..." (boot message start)RX[0]=AA [1]=55 [2]=00 len=12 → SP

Apologies in advance, this is a long one.We are developing a camera application on an STM32H747. We have 32GB of SDRAM configured through FMC.We have a NanEyeC camera from which we are continuously acquiring data in packed bayered format via SPI, into one of three SDRAM framebuffers [A1,A2,A3] (a three-buffer system so that one is reading, one is pending, and one is writing).On our main loop we check to see if one of the raw camera data [A1,A2,A3] has available data and then (1) unpack and debayer it into a 320x320 RGB888 SDRAM framebuffer [B] (we want this intermediate point from which the user can save images), then runs a scaling operation to transfer it into a 460x460 (our display size) RGB888 SDRAM framebuffer [C],After these for loops we start a DMA2D transfer which combines [C] with overlay graphics in 460x460 ARGB4444 SDRAM framebuffer [D], and outputs the result into 460x460 RGB888 SDRAM framebuffer [E], and the DMA2D end-of-transfer interrupt initiates an LTDC-DSI operation w

Hie, according to the documentation of the board, USART1 can be used with db9 port by setting up JP7 and JP8 to 1 and 2 ( which I did). The second thing is to connect usart_tx and usart_rx to PB14 and PB15.The problem is that nothing is showing up on the pc with DB3 port. I've check the tx port with an oscilloscope and I'm getting signal on data sending but only 1.1 V (in AC). I don't know if it's part of the issue but I hope someone has the solutionThanks

I am working with an STM32F769NI and planning to implement my own Ethernet driver without using the HAL. While studying the DMA descriptor system, I found that the hardware supports both ring structure and chain structure descriptors. However, I am having trouble understanding the exact behavior of the ring structure. For example, suppose I have three TX descriptors: DESC0, DESC1, and DESC2. After the DMA finishes transmitting DESC0, how does it advance to DESC1? Since the descriptor size is fixed, does the hardware simply move to the next descriptor by doing something like: current_descriptor_address + descriptor_size? If that is the case, then I don’t clearly understand what the practical difference is between ring mode and chain mode. So my questions are: In the STM32F769 Ethernet DMA, how exactly does the DMA engine move to the next descriptor in ring structure mode? (I would like to understand this at the hardware/register level.) What is the functional difference betw

Hello ST team,We are working with the STM32WL5MOC6HTR module for a LoRaWAN end-device design.We understand that the STM32WL5MOC6HS variant includes an STSAFE-A110 secure element, but our custom module (MOC6HTR) does not include STSAFE.Our question is about securely storing LoRaWAN keys such as:AppKeyNwkSKeyAppSKey We are exploring options like:Using the LoRaWAN Crypto middleware (Middlewares/Third_Party/LoRaWAN/Crypto) with the internal AES peripheral,Leveraging SBSFU (Secure Boot and Secure Firmware Update) for Flash protection (RDP/PCROP),Or possibly using KMS-MW (Key Management Services Middleware). Could you please confirm:What is the recommended approach for securely storing LoRaWAN keys in the STM32WL5MOC6HTR, where STSAFE is not present?Can KMS-MW or SBSFU be used on this device to provide a secure key storage area or API abstraction similar to a secure element?Are there reference examples or application notes for integrating LoRaWAN key storage with SBSFU or KMS on ST

I am using MEMS Studio to evaluate FSM and MLC on the STEVAL-MKI109D + STEVAL-MKI238A . I noticed few strange things. I am attaching my FSM gui config and reg config (config.zip)1. When I open the FSM tab and load the state machine files and device configuration fileone thing I notice right away that its not loading the Long Counter Max value correctly.In my saved FSM configuration I have set it to 0x14 but when I load the configuration it still showing up at 0001Now when I click "Write FSM configuration to the sensor" button and head to Register Map tab, I do see 0x14This is very misleading as the FSM configuration tab is different value that is actually written to registers.  2. Next thing I notice is that when I load my FSM configuration and GUI files and click "Write FSM configuration to the sensor". Head to Sensor Evaluation and return back to Advanced features -> FSM. The FSM ODR now changes to 12.5 Hz.This is how FSM tab looks when I load gui and config fi

I'm using VSCode and J-Link for programming/flashing my STM23 MCUs.Unfortunately using the default setup from SEGGER (https://kb.segger.com/J-Link_Visual_Studio_Code#Support),J-Link only erases areas/pages needed.I found no information about modifying the process of flashing.Is there a way to modify the setup within VSCode in a way, to do a full chip erase when flasing by default?Many thanks!

Hello everyone, I am using the NUCLEO-H755ZI-Q board for a project. I have noticed that the HRTIMs thatare not multiplexed with some USB pins (like the HRTIM_D1 with the D+ for programming the IC via usb)work normally, while if they do, I can't output any PWM pulse. Is this actually a thing and to overcome itI have to remove some of the Zero Ohm resistors behind the nucleo board or design a custom pcb for my needsor am I messing something up? In my situation specifically, i can output from all HRTIM channels except the D1and D2, both of which map to a pin with USB. Thanks in advance! 

 Split from original question Can you check your documentation ?  According to RM086 - Reference Manual for STM32N657, all PH GPIOs can be set as input/output (contradicting your previous post). Default State: When a crystal is used for the HSE (PH0/PH1), PH1 is dedicated to the oscillator output and cannot be used as a general-purpose I/O (GPIO).Bypass Mode: When you configure the RCC (Reset and Clock Control) to "HSE Bypass," an external clock signal is fed directly into PH0 (OSC_IN), freeing up the PH1 pin to act as a standard GPIO.Functionality: As a GPIO, it can be configured as a push-pull output.Please retest your device and determine which document is correct.thanksMatthew

Looking to add a 4 mic pdm array setup to livetune environment. Had questions on how deep into the environment we need to go for the changes. Is it just a matter of changing the # of channels for the sysIn, # of slots and active slots on the pdm interface? or do we need to drive deep as address the audio buffer as well. At one point I thought I read the audio buffer was allocated dynamically. We are just looking for a little guidance before we start changing things as there might be a simple way to achieve our goal vs us guessing and creating issues.

I am working on a project that uses the ST67W611 for cloud connectivity, but I am experiencing some issues when trying to connect to AWS IoT Core.Note: The NCP is already flashed with the T01 binary. The AWS endpoint is correct — for the sake of this question, let’s assume it is:xxxxxx-something.amazonaws.com. What Works Broker: test.mosquitto.org I am able to publish data to the broker and receive data from it when using test.mosquitto.org. However, I am now trying to get it working so that our custom device can connect to AWS IoT Core. MQTT Configuration (This is my current MQTT configuration.)   #define MQTT_BROKER "xxxxxxxxxxxxxxxxxxus-west-1.amazonaws.com" #define MQTT_PORT 8883 #define MQTT_CLIENT_ID "Thing01" #define MQTT_USE_TLS 4 #define MQTT_KEEPALIVE_S 60 static const char s_aws_ca_cert[] = "-----BEGIN CERTIFICATE-----\r\n" "Conten........\r\n" "Conten........\r\n" ..... "-----END CERTIFICATE-----\r\n" static const char s_aws_client_cert[] = "-----BEGIN CERTI

Hello everyone, I am currently working with the NUCLEO-L452RE-P board and trying to evaluate its low-power performance. I am measuring the current consumption using jumper JP6 (IDD measurement point). The jumper is removed and a multimeter is connected in series. My setup: Board powered via ST-LINK USB (then power-cycled before measurement) No external peripherals connected All GPIOs configured as analog, no pull-up/pull-down Debug set to "Serial Wire" (no trace) No RTC or wake-up sources enabled My code is as follows (I intentionally included the complete code to avoid missing any relevant detail): /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2026 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be

Hi I am using latest CubeMx Ver 16.7.0 and CubeIde Ver 2.1.1while trying to compile a USB CDC code this error shows once i linked the code :"C:/Users/../../Hardware - General/../Electronics/../Software/USB_CDC_U0/USB_CDC_U0/Debug/../Core/Src/stm32u0xx_hal_msp.c:102:(.text.HAL_PCD_MspInit+0x4c): undefined reference to `MX_USB_CDC_Init'C:/ST/STM32CubeIDE_2.0.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/bin/ld.exe: (MX_USB_CDC_Init): Unknown destination type (ARM/Thumb) in ./Core/Src/stm32u0xx_hal_msp.oC:/Users/../../Hardware - General/../Electronics/../Software/USB_CDC_U0/USB_CDC_U0/Debug/../Core/Src/stm32u0xx_hal_msp.c:102:(.text.HAL_PCD_MspInit+0x4c): dangerous relocation: unsupported relocationcollect2.exe: error: ld returned 1 exit statusmake: *** [makefile:65: USB_CDC_U0.elf] Error 1 "the called the function "MX_USB_CDC_Init" exist i

Hello,I am trying to share ST-LINKV3 over the network and use it from another PC (WSL Ubuntu distro running docker and connecting to ST-LINKV3 via OpenOCD) with VirtualHere program (client and server), but facing this issue:Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'. Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD Info : clock speed 1800 kHz Info : STLINK V3J17M10B6S1 (API v3) VID:PID 0483:3753 Info : Target voltage: 3.141644 Info : [stm32h7x.cpu0] Cortex-M7 r1p1 processor detected Info : [stm32h7x.cpu0] target has 8 breakpoints, 4 watchpoints Info : starting gdb server for stm32h7x.cpu0 on 3333 Info : Listening on port 3333 for gdb connections [stm32h7x.cpu0] halted due to debug-request, current mode: Thread xPSR: 0x01000000 pc: 0x0800bcb4 msp: 0x2001fff0 Info : Device: STM32H74x/75x Info : flash size probed value 2048k Info : STM32H7 flas

We are pleased to announce that STM32CubeProgrammer 2.22 is available What is new in 2.22: Support for the STM32U3 microcontrollers with 2 Mbytes of flash memory: Internal memory programming through debug and bootloader interfaces Option bytes programming through debug and bootloader interfaces OTP programming through debug and bootloader interfaces Core register programming through debug interfaces Automatic mode Serial Wire Viewer Register viewer Firmware encryption/signing RDP regression with password SFI through debug and bootloader interfaces (USB and UART) Support for STM32C5 series microcontrollers: Internal memory programming through debug and bootloader interfaces Option bytes programming through debug and bootloader interfaces OTP programming through debug and bootloader interfaces Core register programming through debug interfaces Automatic mode Register viewer Firmware encryption/signing RDP regression with password Support for STM32WBA2xxx microcontrollers: Inter

I work in a workspace but I use vim with clangd for editing my code. I am wondering if it is possible to create a compile_commands.json file and if so how. If the IDE uses cmake under the hood then it should be rather straightforward but I cannot understand how to proceed. see e.g. this:https://cmake.org/cmake/help/latest/variable/CMAKE_EXPORT_COMPILE_COMMANDS.html 

I've successfully set up a docker container building my project using the headless script. I've also successfully generated a Windows version of the compile_commands.json using the setting inside the properties menu. But I need a version of this that's from the linux build, because I want to lint inside the docker container for continuous integration. I've looked at what gets changed inside the .settings folder when that setting is changed in the normal non headless IDE ("generateCDB=true"), and I've tried simply building the code with that folder and the files in it in the same place in linux, but compile_commands.json is not generated.

I am looking for a way to use a different editor for a STM32CubeIDE project. For the editor to show correct errors and provide code-completion, I would need a compile_commands.json file, which the clangd language server can use.I found this post which describes how to generate this file using an external program called compiledb. But I also found a setting in STM32CubeIDE under Project -> Properties -> C/C++ Build -> JSON Compilation Database Generator, which can be enabled to have STM32CubeIDE generate a compile_commands.json file when building automatically, which would be exactly what I need.But the created compile_commands.json file seems to be not correct, specifically the relative paths used for the includes are wrong.An exemplary entry in the compile_commands.json file looks like this:{ "directory": "/full/path/to/project/dir", "command": "arm-none-eabi-gcc \"/full/path/to/project/dir/Drivers/BSP/STM32H7xx_Nucleo/stm32h7xx_nucleo.c\" -mcpu\u003dcortex-m7 -std\u003d