Skip to main content
Associate
June 9, 2026
Question

STM32N6 HPDMA

  • June 9, 2026
  • 5 replies
  • 128 views

Iam triying to capture data using timer+hpdma cofiguration , but hpdma is not working, not copying data .. but the same configuration with gpdma is working fine.. how to configure hpdma any special configuration regarding RIF.. please give some brief explanation

 

5 replies

ST Technical Moderator
June 9, 2026

Hello ​@vispal 

Is the HPDMA clock enabled ?

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Saket_Om
vispalAuthor
Associate
June 10, 2026

this is my hpdma configuration below, please check,,, by the i enabled clock. 

 

///////////////////////////////////////////////////////////////////////////////////////

static void MX_HPDMA1_Init(void)

{



/* USER CODE BEGIN HPDMA1_Init 0 */



/* USER CODE END HPDMA1_Init 0 */



/* Peripheral clock enable */

__HAL_RCC_HPDMA1_CLK_ENABLE();



/* HPDMA1 interrupt Init */

HAL_NVIC_SetPriority(HPDMA1_Channel0_IRQn, 0, 0);

HAL_NVIC_EnableIRQ(HPDMA1_Channel0_IRQn);



/* USER CODE BEGIN HPDMA1_Init 1 */



/* DMA channel */

handle_HPDMA1_Channel0.Instance = HPDMA1_Channel0;



handle_HPDMA1_Channel0.InitLinkedList.Priority = DMA_HIGH_PRIORITY;

handle_HPDMA1_Channel0.InitLinkedList.LinkStepMode = DMA_LSM_FULL_EXECUTION;

handle_HPDMA1_Channel0.InitLinkedList.LinkAllocatedPort = DMA_LINK_ALLOCATED_PORT0;

handle_HPDMA1_Channel0.InitLinkedList.TransferEventMode =

DMA_TCEM_LAST_LL_ITEM_TRANSFER;

handle_HPDMA1_Channel0.InitLinkedList.LinkedListMode =

DMA_LINKEDLIST_CIRCULAR;



if (HAL_DMAEx_List_Init(&handle_HPDMA1_Channel0) != HAL_OK)

Error_Handler();



DMA_NodeConfTypeDef NodeConfig = {0};



NodeConfig.NodeType = DMA_HPDMA_LINEAR_NODE;

NodeConfig.Init.Request = HPDMA1_REQUEST_TIM4_CH1;

NodeConfig.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;

NodeConfig.Init.Direction = DMA_PERIPH_TO_MEMORY;



NodeConfig.Init.SrcInc = DMA_SINC_FIXED;

NodeConfig.Init.DestInc = DMA_DINC_INCREMENTED;



NodeConfig.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_WORD;

NodeConfig.Init.DestDataWidth = DMA_DEST_DATAWIDTH_WORD;



NodeConfig.Init.SrcBurstLength = 1;

NodeConfig.Init.DestBurstLength = 1;



NodeConfig.Init.TransferAllocatedPort =

DMA_SRC_ALLOCATED_PORT0 |

DMA_DEST_ALLOCATED_PORT0;



NodeConfig.Init.TransferEventMode =

DMA_TCEM_BLOCK_TRANSFER;



NodeConfig.Init.Mode = DMA_NORMAL;



NodeConfig.TriggerConfig.TriggerPolarity =

DMA_TRIG_POLARITY_MASKED;

NodeConfig.TriggerConfig.TriggerSelection = 0;



NodeConfig.DataHandlingConfig.DataExchange =

DMA_EXCHANGE_NONE;



NodeConfig.DataHandlingConfig.DataAlignment =

DMA_DATA_RIGHTALIGN_ZEROPADDED;



/* IMPORTANT */

NodeConfig.SrcAddress = (uint32_t)&TIM4->CCR1;

NodeConfig.DstAddress = (uint32_t)ic_buffer;

NodeConfig.DataSize = IC_BUFFER_SIZE * sizeof(uint32_t);



NodeConfig.SrcSecure = DMA_CHANNEL_SRC_SEC;

NodeConfig.DestSecure = DMA_CHANNEL_DEST_SEC;



if (HAL_DMAEx_List_BuildNode(

&NodeConfig,

&Node_HPDMA1_Channel0) != HAL_OK)

Error_Handler();



if (HAL_DMAEx_List_InsertNode_Tail(

&List_HPDMA1_Channel0,

&Node_HPDMA1_Channel0) != HAL_OK)

Error_Handler();



if (HAL_DMAEx_List_SetCircularMode(

&List_HPDMA1_Channel0) != HAL_OK)

Error_Handler();



if (HAL_DMAEx_List_LinkQ(

&handle_HPDMA1_Channel0,

&List_HPDMA1_Channel0) != HAL_OK)

Error_Handler();



/* USER CODE END HPDMA1_Init 1 */

/* USER CODE BEGIN HPDMA1_Init 2 */



/* USER CODE END HPDMA1_Init 2 */



}

 

vispalAuthor
Associate
June 10, 2026

Iam working in secured code only , project structure does it have anything to do with RIF(resource isolation frame) as HPDMA is on AXI bus.

static void SystemIsolation_Config(void)

{



/* USER CODE BEGIN RIF_Init 0 */



/* USER CODE END RIF_Init 0 */



/* set all required IPs as secure privileged */

__HAL_RCC_RIFSC_CLK_ENABLE();



/*RIMC configuration*/

RIMC_MasterConfig_t RIMC_master = {0};

RIMC_master.MasterCID = RIF_CID_1;

RIMC_master.SecPriv = RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_NPRIV;

HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_ETH1, &RIMC_master);



/*RISUP configuration*/

HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_TIM4 , RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV);



/* RIF-Aware IPs Config */



/* set up HPDMA configuration */

/* set HPDMA1 channel 0 used by TIM4 */

if (HAL_DMA_ConfigChannelAttributes(&handle_HPDMA1_Channel0,DMA_CHANNEL_SEC|DMA_CHANNEL_PRIV|DMA_CHANNEL_SRC_SEC|DMA_CHANNEL_DEST_SEC)!= HAL_OK )

{

Error_Handler();

}



/* set up GPIO configuration */

HAL_GPIO_ConfigPinAttributes(GPIOA,GPIO_PIN_5,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOA,GPIO_PIN_7,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOA,GPIO_PIN_10,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOA,GPIO_PIN_11,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOB,GPIO_PIN_0,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOB,GPIO_PIN_3,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOB,GPIO_PIN_6,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOB,GPIO_PIN_7,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOB,GPIO_PIN_10,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOB,GPIO_PIN_11,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOC,GPIO_PIN_1,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOC,GPIO_PIN_2,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOD,GPIO_PIN_2,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOD,GPIO_PIN_5,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOD,GPIO_PIN_10,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOE,GPIO_PIN_3,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOG,GPIO_PIN_0,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOG,GPIO_PIN_10,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOG,GPIO_PIN_13,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOH,GPIO_PIN_9,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPION,GPIO_PIN_7,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOO,GPIO_PIN_1,GPIO_PIN_SEC|GPIO_PIN_NPRIV);

HAL_GPIO_ConfigPinAttributes(GPIOO,GPIO_PIN_5,GPIO_PIN_SEC|GPIO_PIN_NPRIV);



/* USER CODE BEGIN RIF_Init 1 */



/* USER CODE END RIF_Init 1 */

/* USER CODE BEGIN RIF_Init 2 */



/* USER CODE END RIF_Init 2 */



}

 

ST Employee
June 12, 2026

Hello @vispal,

You’re on the right track. The main issue is that some RIF pieces are mixed up.

HPDMA is RIF-aware, so you usually don’t configure it through RIMC (and of course not with ETH1 master settings).
What matters for your transfer path is:

  1. HPDMA channel attributes (SEC/PRIV)
  2. TIM4 slave attributes via HAL_RIF_RISC_SetSlaveSecureAttributes()
  3. RISAF rules for protected SRAM (CID whitelist must include your HPDMA CID)
  4. If channel CID filtering is enabled, set the correct perceived CID before HAL_DMA_Start_IT()

Also, for first debug, use simple direct mode first, then move to linked-list/circular mode.

So, make sure the DMA transaction attributes and TIM slave attributes match, and avoid unrelated RIMC master config for this path.

  A minimal configuration might be: 

/* Buffer in AXISRAM2 as an example.
RISAF3 protects AXISRAM2; offsets are relative to the memory base. */
#define RISAF3_ADDR_SPACE_SIZE (0x000FFFFFU) /* AXISRAM2 (1 MB window) */



static void RISAF_Config(void)
{
RISAF_BaseRegionConfig_t risaf_base_config = {0};

risaf_base_config.Filtering = RISAF_FILTER_ENABLE;
risaf_base_config.Secure = RIF_ATTRIBUTE_SEC;
risaf_base_config.PrivWhitelist = RIF_CID_NONE;
risaf_base_config.WriteWhitelist = (RIF_CID_1 | RIF_CID_4);
risaf_base_config.ReadWhitelist = (RIF_CID_1 | RIF_CID_4);
risaf_base_config.StartAddress = 0x0U;
risaf_base_config.EndAddress = RISAF3_ADDR_SPACE_SIZE;

HAL_RIF_RISAF_ConfigBaseRegion(RISAF3, RISAF_REGION_1, &risaf_base_config);
}


static void HPDMA1_Init(void)
{
DMA_IsolationConfigTypeDef isolation_config = {0};

/* Enable the clock of the AXISRAM2 bank holding the source buffer and the
SYSCFG block used for compartment (perceived CID) management. */
LL_MEM_EnableClock(LL_MEM_AXISRAM2);
__HAL_RCC_SYSCFG_CLK_ENABLE();

/*



Original HPDMA config here



*/

/* Secure channel 0, secure source and destination, privileged mode. */
if (HAL_DMA_ConfigChannelAttributes(&handle_HPDMA1_Channel0,
DMA_CHANNEL_PRIV | DMA_CHANNEL_SEC
| DMA_CHANNEL_SRC_SEC | DMA_CHANNEL_DEST_SEC) != HAL_OK)
{
Error_Handler();
}


/* Isolate the channel x to compartment CID 4. This is applied last so the
channel is still programmable by the CPU (CID 1) during init. */
isolation_config.CidFiltering = DMA_ISOLATION_ON;
isolation_config.StaticCid = DMA_CHANNEL_STATIC_CID_4;
if (HAL_DMA_SetIsolationAttributes(&handle_HPDMA1_Channel0, &isolation_config) != HAL_OK)
{
Error_Handler();
}
}

/* Make sure that the TIM4 RISUP config is correct */
HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_TIM4,
RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV);

If you share your full TIM start/request config, I can help check that part too.

You can also check the official DMA_RIF_management example under the STM32CubeN6 for reference on RIF configuration with DMA.

Kind regards, 

DHIF Khaled

"Please mark my answer as best by clicking on the “Accept as solution"" button if it fully answered your question. This will help other users find this solution faster.​"