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Hello,I am a Master's student comparing FreeRTOS and Zephyr on the Cortex-M33 of the STM32MP257F-DK, with Linux running on the Cortex-A35. I measure task timing on the M33 with the DWT cycle counter and an oscilloscope, and I want a second core running a fixed bare-metal load in parallel to see how it affects the M33. A few things I could not find in the documentation:1. Cortex-M0+ as load generator. Can the M0+ run its own firmware at the same time as the M33 (and Linux on the A35)? Can it exchange data with the M33 (shared memory, mailbox, other), and which memories can it access? Who starts it?2. GPIOs for the M33. I need 2 or 3 pins that the M33 can toggle freely to measure with the oscilloscope. Which pins of the DK can be given to the M33, and what has to be changed (RIF, device tree)?3. Firmware already on the M33. Does the DK ship with any firmware running on the M33 (for example USB-PD, as I saw reported for the EV1)? Can I load my own firmware without breaking the board?4. Cy

Hello ST team,I am designing a custom three-phase inverter using the STDRIVE102BP to drive a 24 V, 26 W BLDC motor. I would like to clarify the recommended external connections for VS, VCC, REGIN_3V3, and VDD.I have reviewed the datasheet and the EVLDRIVE102BP schematic, but I am still confused about the power supply configuration. Are separate external 12 V and 3.3 V supplies required? Do I need to supply VS with an external 12 V source and REGIN_3V3 with an external 3.3 V source?Alternatively, if I use an external 3.3 V supply, should REGIN_3V3 and VDD be connected together to bypass the internal 3.3 V LDO? Does this bypass require any SPI configuration, or is it implemented entirely through the external connections? How is the evaluation board powered in its default configuration? In the EVLDRIVE102BP schematic, REGIN_3V3 is connected to VCC through JP4, with pins 1–2 shorted by default.VS appears to receive power from the external supply through the board’s connections. Initially,

Hi,I have this toolchain and need to generate a SBOM:STM IDE v1.18STM IDE GNU Tools for STM32 13.3.Rel1STM32Cube FW_L4 V1.18.1, specified in `\*.ioc` fileSTM32_USB_Device_Library (v2.0_Cube)STM32CubeMX 6.14.0FreeRTOS (10.3.1)How could I turn this into a SBOM?I tried scanning the folder strucutre with syft but this did not work. I then tried to manually make a syft Json file, but when testing for vulnerabiliteies (like e.g. here ) i could not find them. I am not sure how to specify the above components, such that they get recognized by the automated search engine (Grype).I found a statement from ST, that SBOMs will be provided for their products, but I could not find said lists for my toolchain. Some repositories on the GitHub Repositores contain `sbom_cdx.json`. However, I struggle to connect my Toolchain components to the repositories on Github (there are over 700 and for example "stm32cubeIDE" returns 0). Any help is appreciated! Related Links:Wikip

Hello, we’re using the LSMDSOX to detect the shocks on external structures designed to monitor geological phenomena.  We would like to record the acceleration measurements taken immediately before and immediately after the shock into the FIFO buffer.Ideally, we want the detected shock to be positioned in the “middle” of the 512-element FIFO. Unfortunately, we haven't yet determined the best way to configure the system to achieve this behaviour. We tried setting the sensor to Continuous Mode before entering low-power mode and switching to FIFO Mode upon shock detection - this work fine if the shock event occurs few seconds after low power mode is activated; however, it seems that this causes the FIFO to fill up completely if the wait time in low-power mode exceeds a few seconds.We would also like to use the Watermark feature, but it is unclear whether the FIFO will consistently resume recording from the moment the shock was detected.Could someone give any advice? Thank you in advance,Lu

Hello,We use two ST67W611M1 modules with STM32H563 hosts (bare-metal, SPI host interface at 10 MHz; reproduced at 20 and 40 MHz as well). Both modules run the NCP/AT build reporting AT version:1.0.0.1 (Mar 20 2026 09:32:19), sdk 2.0.106. One module is a SoftAP with a TCP server, the other is a station that opens one TCP client link to it.We have a reproducible failure on the station module that we would like you to look at, because its timing is too regular to be load-related.Symptom. Exactly 60 s after AT+CIPSTART succeeds (about 62 s after +CW:CONNECTED), the station module stops serving the SPI host: the next AT+CIPSEND=0,<n> never gets its > prompt, the RDY (data-ready) line stays low, and every subsequent AT command goes unanswered. There are no SPI framing errors on our side (header sync and length checks are clean up to the last frame). The Wi-Fi association and the DHCP lease survive — the AP module's AT+CWLIF still lists the station — so it is the SPI/AT service insid

Hey there,I have made a working implementation of the VL53L9 tof lidar sensor for linux.You can find it here:https://github.com/jonferran/vl53l9cx-pi-lidar Jon

This is the follow-up to my 2023 thread, which is now closed for replies:https://community.st.com/stm32cubeide-mcus-28/azurertos-netxduo-unable-to-download-16k-or-larger-image-using-web-http-client-secure-124990Short version: the stall is in the ST NetX Ethernet glue driver (`nx_stm32_eth_driver.c`), not in NetX Duo, and not a packet-pool sizing problem. The fix is about 40 lines and still applies to the current `STMicroelectronics/stm32-mw-netxduo` main branch, which has the same driver code. I have filed it with ST as a bug with the full write-up and patch: https://github.com/STMicroelectronics/stm32-mw-netxduo/issues/1 **Symptom (from the original thread)**HTTPS downloads of 16 KB or more via `nx_web_http_client` + NetX Secure stalled on every attempt on F417, F429 and H723. Plain HTTP downloaded multi-MB files fine with the same pool. After a stall the socket stayed ESTABLISHED and the pool showed fewer free packets than expected, which I wrongly reported as "free_packets corrupted

I was playing around with CubeMX2 (Version: 1.1.1) and some examples.I took the current STM32CubeC5 FreeRTOS low-power example (git tag cadccf7), generated the CMake project, compiled it in STM32Cube for VSCode and started debugging it… which worked fine initially.I then wanted to enable the “Debug” options inside “HALE System Init” in CubeMX2.After re-generating the project code and compiling it, it did not run properly anymore.It always became stuck inside “ASSERT_DBG_STATE(htim->global_state, HAL_TIM_STATE_ACTIVE);” in “HAL_TIM_Stop_IT” located in “stm32c5xx_hal_tim.c”.The callstack was like this:mx_freertos_app.c → app_freertos_post_sleep → mx_pwr_exit_low_power → mx_rcc_init → HAL_UpdateCoreClock → HAL_InitTick (in stm32_hal_timebase_tim.c ) → HAL_TIM_Stop_IT My actual questions:Is this just a “bug” in the example? If so, how should the code inside “app_freertos_post_sleep” or around it actually look like? If this is a problem somewhere else - How can I fix it or when will it b

Student capstone: VL53L1X vs VL53L5CX for drop-off detection on a wearable aid for blind usersHi ST team,I'm an Electrical Engineering student at BCIT in Vancouver, and my capstone team is building a wearable obstacle detection aid for blind users. A chest-mounted depth camera handles obstacles, and we want dedicated ToF sensors for drop-offs like stairs going down. The sensors would be mounted at chest or waist height, angled down at the floor about 1.5 m ahead of the user, and read over I2C by an ESP32 so drop-off warnings don't depend on the main processor.We're still deciding between 2 to 3 VL53L1X single-point sensors and one VL53L5CX, and would really appreciate a quick recommendation. Our main concerns:- Measuring the floor at a shallow angle from about 2 m away. Which part handles that geometry more reliably, and what would you suggest for field of view or ROI settings?- Dark, glossy, or polished floors (tile, vinyl, gym floors) that may return a weak or specular signal.- Readi

I have been writing some code to recover from the NMI after reading unwritten OTP addresses but I found a bit of a snag when checking that the Address listed in FLASH_ECCDETR is what I would expect after a read.The Table 42 of the H503 reference manual (RM0492 Rev 2) lists a minimum ADDR_ECC offset of 0x0600. I was a little unsure what exactly this meant but `HAL_FLASHEx_GetEccInfo()` clearly runs:// FLASH_ADDRESS_OFFSET_OTP is defined as 0x600 as you would expect herepData->Address = (FLASH_OTP_BASE + ((addr_reg - FLASH_ADDRESS_OFFSET_OTP) * 4U)) & 0xFFFFFFFFU;Seems simple enough then - the number is just which OTP word triggered the error minus 0x600.Except the actual offset I am seeing in the address field is 0x200 instead of 0x600.Reading an unwritten OTP at 0x08FFF010 gives me an ADDR_ECC of 0x204, reading 0x08FFF020 gives me 0x208, and so on...Is this an error in the Reference Manual and HAL? Should the listed value be 0x200 or am I missing something here? Thanks!

HI everyone,I am using STWINBX1 sensor board. i am facing a problem while converting the .DAT file  to CSV file. i have recorded the data on SD car using the ST BLE sensor app. the converted data seems to be corrupted. i have used only one sensor  iis3dwb_acc for data acquistion. is there any easier way for the conversion of the data. i have used the python code which comes with the FP-sns-datalog2-1.2.1 (older version) called hsdatalog_data_export. and  i am using the latest DATALOG2 version 3.4 on the board. as we cant record with older versions.thanks in advance 

Hello,while investigating a HardFault on an STM32U385RGT6Q, I noticed several differences in the code generated by newer CubeMX versions.At the moment I am unsure whether I have overlooked a configuration dependency or whether this is an actual CubeMX code generation issue.Environment:MCU: STM32U385RGT6QFlash Configuration:    Total Flash : 1 MB    Bank 1      : 512 kB    Bank 2      : 512 kBApplication Memory Layout:    0x08000000 - 0x080FDFFF  Application Flash (1016 kB)    0x080FE000 - 0x080FFFFF  Parameter Storage (8 kB)Protection Settings:    Application Area:    Read Only by Privileged Code Only    Parameter Storage:    Read / Write by any Privileged level In CubeMX Version 6.15.0 Flash and MPU initialisation look like this: static void MX_FLASH_Init(void){ /* USER CODE BEGIN FLASH_Init 0 */ /* USER CODE END FLASH_Init 0 */ FLASH_OBProgramInitTypeDef pOBInit = {0}; FLASH_BBAttributesTypeDef FLASH_BBSecInitStruct = {0}; /* USER CODE BEGIN FLASH_Init 1 */ /* USER CODE END FLA

Hello,We are designing a PCB around the STM32N657B0 (VFBGA198) using the internal SMPS. VDDSMPS and VDDA18PMU are fed from a dedicated 1.8 V buck, with VDDA18PMU filtered from the same rail, as per Figure 2 in DS14791.For our derating and fault analysis we need the absolute maximum ratings of these two pins, and we cannot find them in any current ST document:DS14791 Rev 11 (Sep 2026), Table 22 “Voltage characteristics”: no VDDSMPS or VDDA18PMU row. The “VDDA18 – VSS, 1.98 V” row lists only VDDA18PLL, VDDA18CSI, VDDA18USB and VDDA18ADC. DS14791 Rev 11, Table 25 “General operating conditions”: VDDSMPS and VDDA18PMU are 1.62 / 1.8 / 1.89 V. DS14791 Rev 11, Table 29 “Characteristics of SMPS step-down”: the input is called “VDDA18”, 1.62 to 1.89 V. AN5967 Rev 6, AN6000 Rev 1 and RM0486 Rev 4: no absolute maximum for either pin.QuestionsWhat are the absolute maximum ratings (min and max) for VDDSMPS and VDDA18PMU? Does the “VDDA18 – VSS, 1.98 V” row in Table 22 also cover VDDSMPS and VDDA18P

For example, if I edit the ‘Synchronous Predivider’ value for the STM32F030 RTC: Then, say, click on TIM1: Then go click back to the RTC view: My edit is gone! I’ve also been caught-out with this on UART baudrate.I suspect it applies to any numeric-entry field. This should, at least, ask if I want to lose edits. On Win11-Pro.

I wish to get a better understanding of how the TNR works. The precision figures given in the DS are with the TNR enabled. What is not clear from this is what impact it has on the frequncy response of the sensor. So, suppose I have a linear actuator moving sinusoidally at 3Hz over a few mm radially to the sensor, will this be picked up cleanly without attentuation with the TNR enabled or would I need to disable it? I can operate the sensor at 30fps up to 100fps for data capture. thanks    

Hi Experts,I am facing an issue with my custom board based on the STM32H725RGV6. The VCAP voltage remains around 80 mV, preventing the MCU from starting.My intention is not to use the internal SMPS, and I would like to operate the controller in the 100-200 MHz range using the external LDO regulator (As internal LDO not available)Could you please help clarify the following:Can the VFQFPN68 package operate using the internal LDO only, without the SMPS circuitry? Is a VCAP voltage of approximately 80 mV indicative of an incorrect power configuration, damaged device, or missing connection? If the internal LDO is unavailable in this package, would supplying a stable external 1.2 V rail to the VCAP pins while keeping the SMPS disabled/bypassed be a valid solution? Or is the use of the SMPS pins and associated external components mandatory for this device/package?Unfortunately, my PCB layout does not have sufficient space remaining to accommodate the SMPS inductor and related components, so I

hi good day,may we seek your expertise regarding discrepancy on assembly origin in packaging vs country origin on top marking of the chip.is it correct to interpret that China is the country of diffusion(wafer) and Italy is the final assembly and testing?thank you very much for enlightenment.

Hi all,My MX_SDMMC1_SD_Init() is failing and dropping into Error_Handler() on a custom STM32U575RGT6 board.I traced it down to SD_PowerON() failing — it returns HAL_SD_ERROR_UNSUPPORTED_FEATURE. Digging deeper, this happens because one of the internal response-check calls (SDMMC_GetCmdResp1() / GetCmdResp2() / GetCmdResp3()) is returning SDMMC_ERROR_CMD_RSP_TIMEOUT (the CTIMEOUT flag gets set) — basically the card isn't responding to one of the commands sent during power-on/init.i have checked HAL_SD_InitCard() clock divider formula where  HAL correctly computes ClockDiv = 21 for 16 MHz kernel clock also measured SDMMC_CK on oscilloscope and getting 381.7 kHz which is within spec (≤400 kHz)we have external pull ups at all pins of sdmmc plus when i run on this fun SDMMC_CmdAppCommand i can see activity on CMD line but i didnt get any response on that line.the clock i’m giving is HSE PLL1P to SDMMC clock mux which is 16Mhz final  

Hello, I just started in stm32 system, I want to ask for stm32N6 series can use other camera module? such as camera product from Arducam where the product is made for raspberrypi systemwhich uses CSI-2 interface, here product link : https://www.arducam.com/product/64mp-quad-camera-kit/Thankyou

I previously experimented with performing the FTM Demo (Firmware Upgrade) in ST25PC-NFC on an ST25DV Discovery board, using both the STEVAL-25R3916B and FEIG MR102 readers. The demo worked successfully with both readers, although there was some difference in transfer speed. We are now looking to implement OTA firmware updates on our NFC-enabled product, which is based on a PIC microcontroller. We have integrated the ST middleware into our application and are currently testing the firmware upgrade functionality using FTM. The firmware upgrade works correctly when using the STEVAL-25R3916B reader. I have attached the relevant logs below. However, when using the FEIG MR102 reader, the firmware upgrade does not work correctly. After comparing the ST logs, it appears that there is a difference in the timing and behaviour of the writeMsg calls between the two readers. With the FEIG MR102: The first packet is always transferred successfully. Almost all subsequent packets require a second at

Hi, I am wondering if anyone has had any experience using the STM32N6 onboard H264 encoder? I am trying to write a business case for using this MCU, which claims it can broadcast H264 video at 720p & Audio at a stable 30fps over LAN without any noticeable drops in performance? The only solutions I have found so far have been dedicated SoC.

Hello ST Community,I am working with the STM32U535RET6 and need clarification on the interaction between the IWDG Window feature and Early Wake-up Interrupt (EWI).I tested the following configurations:1. Window enabled, EWI disabledThe Window feature works as expected:Early refresh → IWDG reset Late/no refresh → IWDG reset2. EWI enabled, Window disabledWhen only EWI is enabled, the EWI interrupt occurs when the counter reaches the configured EWIT value.In the ISR, the HAL code acknowledges the EWI by setting EWIC.According to RM0456, writing EWIC = 1 clears EWIF and also reloads the IWDG counter with RL[11:0].However, in my observation, the EWI ISR is called only once, and I do not observe the expected counter reload after the EWI acknowledgement.3. EWI and Window enabled togetherWhen both features are enabled, I observe different behavior.For example, with EWI configured for approximately 2 seconds, the EWI occurs repeatedly at approximately every 2 seconds. The IWDG counter appears t

I was wondering, despite the 10-year longevity commitment cited on the page of the STM32G0 microcontroller, the STM32G0B0VET6 has basically no more supply worldwide and lead time of more than a year.Is there a reason for that? Should I move to a more “available” microcontroller?

In our Project CAN communication isestablished via CANtrcv TJA1145, the INH is triggering the wakeup to L99ASC03, then the watchdog present in L99 is triggering to switchof MCU so I need to control the Watchdog via SPI by writing the value to its register as in L99ASC03 Datasheet shown below, could you please support how shall I implement this to send via SPI.​​​​​ 

Among 20-odd PCBs populated with STM32G431CBUx controller, I am facing issue in programming one of them. All the others works fine, with no issues what so ever.The RDP is set to 0xFF, and the BOOT_LOCK bit was set. I searched through the community posts and tried the following methods.Set the BOOT0 pin High and enter through “Under Reset” mode → try to reprogram RDP to 0xAA. Try resetting through NRST and then reprogram the option bytes15:42:24 : ST-LINK SN : 0670FF56494889776713344115:42:24 : ST-LINK FW : V2J33M2515:42:24 : Board : NUCLEO-F303RE15:42:24 : Voltage : 3.25V15:42:25 : SWD freq : 4000 KHz15:42:25 : Connect mode: Under Reset15:42:25 : Reset mode : Hardware reset15:42:25 : Device ID : 0x46815:42:25 : Revision ID : Rev X15:42:25 : Debug in Low Power mode is not supported for this device.15:42:25 : UPLOADING OPTION BYTES DATA ...15:42:25 : Bank : 0x0015:42:25 : Address : 0x40022020 15:42:25 : Size : 84 Bytes15:42:25 : UPLOADING .