ST33TPHF2XSPI: Intermittent incorrect DID_VID reads over SPI
Hi,
I’m debugging intermittent DID_VID read errors on an STPM4_RASPI v1.2 evaluation board with an ST33TPHF2XSPI. The host is an Arty A7-100T FPGA. The interface is SPI mode 0 at 10 MHz with 3.3 V I/O, and the TPM board is powered from the Arty’s PMOD 3.3 V supply.
When I repeatedly read four bytes from DID_VID using the SPI header 83 D4 0F 00, the TPM returns the expected value, 4A 10 00 00, for an extended period. Incorrect responses occur intermittently after many successful reads. On a failing read, I observed 81 FF 81 FF when locality 0 was inactive and A1 FF A1 FF when it was active. Acquiring and releasing locality without resetting the TPM changed the incorrect response accordingly.
In the Saleae captures, the DID_VID header on MOSI is correct, the incorrect bytes are visible on MISO, and CS stays low through the header, wait, and data phases. Incorrect reads typically show about 15 wait bytes in our logs, versus about one for correct reads. The issue occurs at both 1 ms and 1 s polling intervals. Resetting only the TPM restores correct reads.
We reproduced the issue with two ST evaluation boards, two FPGA boards, and different SPI master implementations, including AXI Quad SPI. We did not observe the same failure in a comparison test with an Infineon SLM9670.
Has anyone seen this behavior on the ST33TPHF2XSPI? Is there a known issue or a recommended SPI timing, reset, or power supply check that could help explain the longer wait phase and the locality-dependent response?