Multiple Devices on MiPi - VL53L9CX

[GZOJRO]

Hello,
 

Our setup uses a VL53L9-based board with an STM32N657 (NUCLEO-N657X0-Q). The sensor streams RAW8 over one data lane at 1 Gbps on VC0. We are using ST’s driver, and 54 × 42 at 100 fps works well.

We would like to connect three or four sensors to the N657’s CSI-2 receiver and trigger them through SYNC_IN at staggered times, so their frames do not overlap on the link. Each frame occupies the link for about 0.24 ms of the 10 ms period.

We checked the receiver’s lane-state flags between frames. The clock lane remains in high-speed mode throughout streaming, while the data lane returns to the stop state (LP-11). This suggests that the sensors keep driving both lanes, which would prevent them from sharing the same lanes without a MIPI switch or bridge.

Could you please clarify the following?

1. Clock-lane mode: Can the VL53L9CX use non-continuous clock mode and return its clock lane to LP-11 between frames? If so, which register or firmware patch enables this?
2. Pin states: Can the MIPI clock and data pins be placed in high impedance between frames while the sensor continues ranging? What are their states in hardware standby (XSHUT low) and software standby?
3. Virtual channels: The driver defines the virtual-channel register as one bit. Are VC0 and VC1 supported? Can VC2 or VC3 be used?
4. I3C with multiple sensors: Do two VL53L9CX sensors have different 48-bit provisioned IDs for dynamic address assignment, or should we release XSHUT one sensor at a time and assign addresses sequentially?
5. Reference design: Is there a reference design or recommendation for connecting multiple VL53L9CX sensors to one CSI-2 host, such as a 2:1 MIPI switch or an aggregator?

Thank you for your continued support.

[MathieuA]

Hi ​@GZOJRO ,

That is an excellent question, and some documents that might be of interest are currently in preparation.

Soon, on st.com on the VL53L9CX page, an application note will be published that explains how to connect multiple devices. The first version of that document is scheduled for completion within three weeks, before the Nov. 10th webinar. Without revealing too much, the document explains how to program a new address in one-time programmable (OTP) memory when multiple devices are connected on the same interface. It also includes a few reference designs. In addition, the next N6 release includes new example code with multiple-device support.

The following answers address the questions as clearly as possible.

Q1 - The firmware manages the MIPI state indirectly. Changing the power mode also changes the MIPI state during the interframe period. Depending on the VL53L9CX power mode during interframe, MIPI enters the LP state when the L9CX is configured in regular or low-power mode, and the ULP state when the L9CX is configured in ultralow-power mode.

Q2 - This point still requires verification. It is not yet confirmed whether the device is in a high-Z state.

Q3 - The virtual channel is 2 bits in the firmware user interface (UI), so 0, 1, 2, and 3 are supported.

Q4 - By default, all L9CX devices have the same PID during dynamic address assignment (DAA). The instance ID is part of the 48-bit PID used during DAA. If two devices have the same PID, an arbitration error occurs. For this reason, a different instance ID must be set before the host calls the dynamic address assignment function.

There are two main options:

• Program the OTP memory with a new I²C address and instance ID
• Program a new address and instance ID in software during boot

Both options have advantages. The first option is a permanent change. It is done once, and it applies permanently. The main benefit is that it speeds up and simplifies boot. After OTP programming, the same XSHUT pin can be shared by two or more devices. After reset, start DAA and boot all devices in parallel at the same time.

The second option is preferred for debugging and prototyping. This is the option selected for the example code. This option is not persistent, but it is more flexible during prototyping. Therefore, the L9CX must be booted one device at a time. Enable the first device, change the I²C address and instance ID, and then enable the next device and change its address. The driver exposes a function for this operation. One XSHUT pin is required for each device. Once all devices are programmed, DAA can be called.

Q5 - This configuration was prototyped a few months ago, and the application example will be included in the application note. A MIPI switch was selected (reference: TMUX157xxx). At the application level, a GPIO selects the device to connect. The application also triggers frame acquisition with a GPIO. During the frame acquisition of one sensor, the frame of the second sensor is processed. The configuration works well with the three different power modes.

The answers are expected to address the questions.

Interest in learning more about the project and the intended use case remains.

Best regards,

Mathieu