Product forums

Question about using livetune when using a 4 channel sys input.We have a 4 channel PDM mic input but having trouble figuring out how to get the individual channels. For example if I wanted to delay just ch 1, how would I go about that. I don't really see a way to get access to the individual channels. deinterleave seems to be the useful but how do I know ch 0, ch 1 ... are going to which deinterleave output if i fact deinterleave is the correct element.We are trying to do some beam forming with 4 channels if that helps. [removed label 'CubeIDE' as this is about audio and X-CUBE-AUDIO-KIT software - p.a.]

Hi, I'm having trouble building the core-image-weston image. I'm using Ubuntu 22 and VMware Workstation.config in local.conf:MACHINE = "stm32mp1"DISTRO ?= "poky"EXTRA_IMAGE_FEATURES ?= "debug-tweaks"USER_CLASSES ?= "buildstats"PATCHRESOLVE = "noop"BB_DISKMON_DIRS ??= "\STOPTASKS,${TMPDIR},1G,100K \STOPTASKS,${DL_DIR},1G,100K \STOPTASKS,${SSTATE_DIR},1G,100K \STOPTASKS,/tmp,100M,100K \HALT,${TMPDIR},100M,1K \HALT,${DL_DIR},100M,1K \HALT,${SSTATE_DIR},100M,1K \HALT,/tmp,10M,1K"PACKAGECONFIG:append:pn-qemu-system-native = " sdl" CONF_VERSION = "2"    Error :ERROR: libglu-2_9.0.3-r0 do_configure: meson failedERROR: libglu-2_9.0.3-r0 do_configure: ExecutionError('/home/dawid/Projects/yocto/build-mp1/tmp/work/cortexa7t2hf-neon-vfpv4-poky-linux-gnueabi/libglu/9.0.3/temp/run.do_configure.2642423', 1, None, None)ERROR: Logfile of failure stored in: /home/dawid/Projects/yocto/build-mp1/tmp/work/cortexa7t2hf-neon-vfpv4-poky-linux-gnueabi/libglu/9.0.3/temp/log.do_configure

Hello,We are currently performing tests on stepper motor driver boards.We are using a NUCLEO-F401RE board, which works correctly with the X-NUCLEO-IHM14A1: the motor rotates normally using the interface provided by STSPIN Studio 2.0.However, while keeping the same NUCLEO-F401RE board and replacing the X-NUCLEO-IHM14A1 with an evaluation board based on the STSPIN948, we are unable to make the motor rotate. The motor produces a whistling and mechanical noise, but no rotation occurs.The following configurations have been applied       - J5 = 1       - J6 = 1       - J7 = 0In addition:       - Modifications to REFA and REFB have no effect on the motor behavior.       - Changing parameters in STSPIN Studio 2.0 does not seem to affect the board.       - Using an oscilloscope, we verified that the phase shift between signals A and B is correctly set to 90°.Could you please h

Hello everyone, I have my own custom board based on the STM32WLE5CC , and I want to build a LoRaWAN project on it. For the RF design, I used the MB1874-LP reference schematic as a base, together with the BALFHB-WL-06D3 balun/filter for a 2-layer PCB, following application note AN6322. I also studied AN5407 and AN5757, and for LoRaWAN specifically AN5406, as well as this video: https://www.youtube.com/watch?v=hJFv4RbN878 The main issue is that almost all available materials only explain how to use the ready-made End_Node example project. At the moment, I am also studying UM2643. Could you please tell me specifically what else I should study for this topic? Maybe I have missed some important materials or documentation related to developing a custom STM32WLE5CC LoRaWAN firmware from scratch. I also have one more hardware-related question:I accidentally swapped the positions of L3 and C26 in the RF matching network (see screenshot). Could this cause TX power loss or reduce RX sensitivity?

Hi,I am planning to use an STM32N6 in a project where I need a real-time clock (RTC).My goal is to run the RTC with minimal power consumption. As far as I understand, this involves using the V_BAT domain, where the microcontroller is supplied through the dedicated backup supply pins.In my application, only the RTC needs to be running, while the rest of the system should be completely inactive. The main supply voltage will be absent most of the time.According to the datasheet, I end up with a current consumption of about 40.5 µA at 25 °C in this configuration. This seems quite high, especially when targeting a lifetime of around 5 years.Since it appears that only a small portion of this current is actually used by the RTC itself, I am wondering if there are ways to further optimize the configuration to reach something closer to 1 µA or below.I would really appreciate any tips, best practices, or measurement results.Best regards,Marius

Hi, newbie here - I have some experience with the f4 series, but am working on a small project for which I would like to try a stm32u0 MCU. Looking at the stm32u031 20-pin TSSOP, I am confused by something. When I load this MCU in cubeMX, and tick on I2C 1, I see a single pin 'light up' for both SCL and SDA. The datasheet implies I should be able to choose a pin with an alternate function for one of these, but I can't figure out how I might do this....I see pin PA8 seems to have an alternate mapping to PA9, which seems like it might work for i2cSCL, but I don't know how to select it. I feel like an ***, but I'm unsure how to configure this using cubeMX, or how one is meant to work with these apparently-double-functioned pins? Thanks!

I need the version that support programming the PSD311,as well as the DLPortIO driver.Thanks. 

Product: STM32H755ZI (Nucleo-H755ZI-Q, nucleo_h755zi_q/stm32h755xx/m4)Core under test: Cortex-M4 (CM4, CPU2), running at 240 MHz (D2 domain clock)RTOS: Zephyr RTOS (west build system, Zephyr SDK)Toolchain: arm-zephyr-eabi-gcc (Zephyr SDK)I am benchmarking different SRAMs on the CM4 core of the STM32H755 and measuring memory access latency across the available SRAM regions using k_cycle_get_64() (Zephyr cycle counter, backed by DWT CYCCNT). My benchmark allocates identically-sized and identically-aligned buffers in SRAM1 (0x30004000), SRAM2 (0x30020000), and SRAM3 (0x30040000) then performs the same read/write pattern against each.Observation: SRAM2 read access from the CM4 is measurably and reproducibly faster than SRAM1 read access by 1 cycle per 32-bit word, as measured via k_cycle_get_64() (backed by DWT CYCCNT). SRAM1 and SRAM3 exhibit the same read latency as each other. Write cycles are uniform across all three SRAMs. This behavior is consistent across multiple runs with the CM7

Hello,I am using the STM32H7B3I-EVAL board with STM32H7B3LIH6Q controller.The board revision I am using is MB1370-lcd-b02 a254300030.I downloaded the official demo package from the ST website:STM32H7B3I-EVAL → Tools & Software → Demo Code Package.After extracting the ZIP file, I tried flashing the provided  .hex demo file into the controller using STM32CubeProgrammer.However, programming fails with the following errors:Error: failed to download Sector[0]Error: failed to download the FileThe board is detected correctly through ST-LINK, and connection is successful. I already tried:Reducing SWD frequencyFull chip eraseHardware reset / Under reset modeBut the issue still occurs.Could anyone please suggest:Whether the provided demo .hex file is directly compatible with STM32H7B3LIH6Q?If any special option bytes or external memory configuration is required?Whether the demo depends on external QSPI/OSPI memory or specific boot settings?Thank you.   

Hi,using STM32CubeIDE 2.1.1 and STM32CubeMX 6.17, I'm a little confused on how to import an existing ioc-file created by CubeMX into an existing project in CubeIDE. And to later modify it.Confusion is drawn from this tutorial: https://community.st.com/t5/stm32-mcus/stm32cubeide-2-0-0-workflow-tutorial/ta-p/864831 At the end, it is somehow saying to use the import function of CubeIDE for an ioc-File which is located (physically) on a different location than the project itself (ioc-file in §2.3 tutorial c:/users/ST/Documents while project is in workspace 2.0.0, from which I assume it is stored in a different folder).Then, later on in §2.5, MCU gets some modification (added I2C in the example) and code is newly generated (in c:/users/ST/Documents and CubeIDE requires a refresh (F5) to capture the updated MCU configuration) (see also equivalent video tutorial at around 4:05min)So good, so confusing. Why?1) CubeIDE shows the ioc-file in the project tree, and is physicall

We are using MPN: STM32U375VGT6Q in one of our projects, with the internal RC oscillator configured as the core clock source.During board validation, when the system clock was configured to the maximum frequency of 96 MHz, we observed a signal integrity issue. Specifically, the SPI clock signal (96 MHz / 2) does not return properly to the 0V base level,To rule out any PCB trace-related effects, we measured the signal directly at the MCU pin.as attached. Please help us with the necessary resolution for the issue observed.

We are considering a system configuration in which a model created in Simulink is programmed onto an STM32 microcontroller, and CAN communication (both transmission and reception) is performed.In this context, we would like to ask for your recommendations regarding:STM32CubeMX configuration required for CAN communicationKey hardware wiring points and precautions when using CANWe would appreciate it if you could share any recommended settings or best practices from STMicroelectronics.In particular, we would be grateful for your advice on any points to consider regarding consistency between CubeMX configuration/initialization code and code generated using Simulink and Embedded Coder.

hello ST Community,I'm trying to protect sector 0 of the flash drive from mass erasure using the PCCOP Protection option on the NUCLEO-H755ZI-Q.After tinkering around a bit to understand its functions, I can no longer reset its protection to its default state. Currently, it looks like the one in the photo:When I try to set these valuesPROT_AREA_START1 = 0x0801FF00PROT_AREA_END1 = 0x080100FFwhich i believe are their default values, both in the RDP=0xAA and RDP=0xBB states, I get this error.How can I fix this? Is there a way to reset PCROP Protection to its default mode?Thanks for the support.

I am using a stm32 F103RCT6 mcu. It has 256 Kb of flash memory. But when i connect it to cube programmer, it shows there are 256 sectors of 2K size which equates to 512 Kb flash.  I was even able to go to that last page and write data to it. so is the linker script generated by HAL wrong?    

I was wondering what is that. I created a custom bootloader firmware and application firmware. But once I successfully uploaded. When I send application firmware resquest I do not receive application firmware responses. Why is that? what is that? do you recognize that?  The AA 01 00 00 BB is the application firmware request frame.  0xAA is the begining 0x01 is the length 0x00 is the frame request ID  0x00 is the checksum 0xBB is the end of the frame  Thanks for all. 

 Hi everyone,I am working on a project using the STM32H753ZI Nucleo-144 board. My goal is to save data to an external USB thumb drive via the CN13 (USB OTG FS) port.My Environment:RTOS Stack: ThreadX, NetXDuo (Ethernet is working), USBX (Host/Storage Class), and FileX.Tools: STM32CubeMX v6.12/6.17 and IAR Embedded Workbench.Clocking: Using HSI48 for USB, stabilized by the CRS (Source: LSE).Hardware Configuration:VBUS: Manually controlled via PD10 (STMPS2141). I have confirmed with a multimeter that 5V is present on the port when the software runs.VBUS Sensing: Disabled in CubeMX (since I am driving power manually).USB_OTG_FS Settings:Mode: Host_Only.Speed: Full Speed (12 MBit/s).DMA: Disabled.Interrupts: USB OTG FS global interrupt enabled (Priority 15).The Issue: Despite the drive having power, the USBX stack does not seem to trigger the device insertion callback. I suspect the issue lies in the registration of the Host Controller Driver (HCD) or the link between the HAL interrup

Kindly help me with this. Im using a STM32 blue PILL - stm32F103C8Open On-Chip Debugger 0.12.0+dev-00608-gd8ed48fef (2025-02-06-11:17) [https://github.com/STMicroelectronics/OpenOCD]Licensed under GNU GPL v2For bug reports, readhttp://openocd.org/doc/doxygen/bugs.htmlInfo : Listening on port 6666 for tcl connectionsInfo : Listening on port 4444 for telnet connectionsInfo : STLINK V2J46S7 (API v2) VID:PID 0483:3748Info : Target voltage: 3.215873Info : clock speed 4000 kHzInfo : stlink_dap_op_connect(connect)Info : SWD DPIDR 0x1ba01477Info : [STM32F103C8Tx.cpu] Cortex-M3 r1p1 processor detectedInfo : [STM32F103C8Tx.cpu] target has 6 breakpoints, 4 watchpointsInfo : [STM32F103C8Tx.cpu] Examination succeedInfo : starting gdb server for STM32F103C8Tx.cpu on 3333Info : Listening on port 3333 for gdb connectionsInfo : accepting 'gdb' connection on tcp/3333Info : device id = 0x20036410Info : flash size = 64 KiBWarn : GDB connection 1 on target STM32F103C8Tx.cpu not haltedundefined debug reason

 Could you provide technical details or reference designs for a 2W wireless charger based on the STWBC86JR?

I'm working with an STM32U3C5RIT6 using the HSP to do some FFT-based audio DSP with the HSP Engine middleware. I've got it working correctly using direct mode and I'm trying to squeeze out a bit more performance using process lists but for some reason the RFFT output isn't the same when used in a process list.Here's the code I use for accelerator / direct mode which works correctly:HSP_ACC_VectMul_f32(&hmw, FFT_Buffer, Window, FFT_Buffer, HSP_BLKSZ); HSP_ACC_Rfft_f32(&hmw, FFT_Buffer, HSP_LOG2NBP_512, 0U, 1U, HSP_RFFT_TYPE_2);I then create a process list using the SEQ versions of the same operations:HSP_SEQ_StartRecordPL(&hmw, PROC_IN); HSP_SEQ_VectMul_f32(&hmw, FFT_Buffer, Window, FFT_Buffer, HSP_BLKSZ, HSP_SEQ_IOTYPE_DEFAULT); HSP_SEQ_Rfft_f32(&hmw, FFT_Buffer, HSP_LOG2NBP_512, 0U, 1U, HSP_RFFT_TYPE_2, HSP_SEQ_IOTYPE_DEFAULT); HSP_SEQ_StopRecordPL(&hmw); --snip-- HSP_SEQ_RunTask(&hmw, PROC_IN, PRC_TIMEOUT);and the results are not the same. If I delete th

Hi,I’m trying to use VSCode extensions but i find it hard to understand and debug my workflow constantly. When i want to create new project i first generate code scaffold in CubeMX. Then i use VSCode extension to configure the project, then i try to build or flash my project to the board and im met with huge amount of errors with cmake, toolchains etc. I Think im missing something here becouse it’s impossbile to work like that. If you have any ideas what am i doing wrong please leave your suggestions. Id be happy to provide any additional details too.

I have a complex product where I am running multiple micros with firmware that needs to be debugged. I have 2 stlinks plugged in. But I am stumped at trying to get the VSCode STM32 extensions to target a specific stlink. My launch.json is using stlinkgdbtarget as the debug type."serverArgs" is where I have tried ["-i","<stlinkserial>"] but the debug session launches and in the debug output it prints multiple stlink devices detected, so the session fails. Is there a way to debug if the serverArgs are even being used?Is there a different way to select a stlink?

Hello,For students, we recently bought the STM32MP257F eval board, and the related camera and hdmi bridge.Everything works perfectly and I would like to connect a Raspberry Camera v2. (IMX219) to the board, as it is also a CSI/MIPI camera (and whe have severals).Can it work ? what should be done related to the software ? (drivers and so on).By the way, what is the process to install packages in the board  ?Best regardsS. M.  

Hello, I am currently working on a project where we want to use the VL53L7CX sensor for motion detection.  Looking through the documentation, I couldn't find any information on what the read and write addresses and values are for communicating with the VL53L7CX, there was just the X-CUBE-TOF1 Time of Flight expansion software for the STM32Cube IDE. I wanted to know if there was information available to communicate with the VL53L7CX via I2C, since I wanted to use the ESP32 for writing the firmware using the Espressif platform.

Hi Everyone,We are developing a Sub-GHz/LoRa device based on STM32WLE5CCU6 and have encountered an issue relatedto the Sub-GHz Radio BUSY state. We would like to ask for possible root causes and the recommendedrecovery procedure.The observed behavior is as follows:1. After MCU peripheral initialization, we call MX_SubGHz_Phy_Init() and then Radio.Init() /Radio.Sleep().2. We then try to execute HAL_SUBGHZ_ExecGetCmd(&hsubghz, RADIO_GET_ERROR, ...).3. The command keeps returning HAL_ERROR, and HAL_SUBGHZ_GetError(&hsubghz) returns 0x00000002, whichcorresponds to HAL_SUBGHZ_ERROR_RF_BUSY.4. We poll this command once per second for 10 seconds, and all attempts fail with the same error.5. We also checked the PWR flags before. PWR_FLAG_RFBUSYS remains active, which indicates that thecurrent RF BUSY signal stays high.6. PWR_FLAG_WRFBUSY can be cleared, but RFBUSYS remains high. Therefore, this does not look like apending wakeup/event flag issue, but rather the actual RF BUSY hardware

Hi everyone,I’m working on a small tool idea around STM32 / Cortex-M debugging, and I’d like honest feedback before building too much.The problem I’m trying to validate is this:When a Cortex-M firmware crashes into HardFault_Handler, many students, junior developers, and even intermediate embedded developers struggle to understand what actually happened. The data is usually there — CFSR, HFSR, BFAR, MMFAR, stacked PC, LR/EXC_RETURN, stack frame, GDB logs — but interpreting it correctly is not always obvious.The idea is not to build another IDE or replace STM32CubeIDE, VS Code, Ozone, or GDB.The first version would be an offline analyzer:input: .elf file, GDB log, register dump, stack dumpoutput: a clear report explaining the probable fault cause, source line if available, decoded fault registers, and suggested next checksExample use case:firmware crashes into HardFaultdeveloper copies the relevant GDB/register dumptool generates a readable diagnostic reportI’m especially interested in