About PDR

PDR · 2020-10-13

PDR · 2020-10-11

I can send ARP, UDP, ICMP, and so on, and all the other IGMP messages, but not the IGMP V2 Membership Report messages. Wireshark doesn't show those at all, but does show the others going out. So I've written a low-level driver test that composes the ...

PDR · 2020-10-06

PDR · 2017-11-30

Posted on December 01, 2017 at 04:55I am writing a driver for an old Lego NXT ultrasonic sensor. It uses I2C, which is fine in itself, but the sensor has a well-known bug such that it does not always follow standard I2C protocol. Specifically, it re...

PDR · 2020-10-13

I'm polling that register and several others while sending and receiving packets, for example the counts of good frames transmitted, good unicast frames received, frames missed, the status bits of RDES0, and so on. So I expected to see some of the bi...

PDR · 2020-10-13

OK, will do.

PDR · 2020-10-12

Thanks very much Imen!Do you happen to ave any insights as to getting nonzero values from the MACDBGR fields, now that the SVD description conforms to the RM description? I see no text about enabling, or other required settings.Pat

PDR · 2020-10-12

Hello Imen,Yes please, an updated version would be much appreciated.Pat

PDR · 2020-10-09

Hi,I believe it is version 1.1 of STM32F7x.svd. Do I just have an older version? In addition, for the MACFFR register, it has the PAM field named RAM.In any case, shouldn't the MACDBGR fields be nonzero sometimes? I never see a change.Thanks!Pat

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At run-time my ETH_MACDBGR register samples always come back zero for all 32 bits. Does it require some enable bit to be set, or some idiom for when to read it? This is on an STM32F746G Disco.

Can't send one kind of IGMP msg on an STM32F746G Disco, but other kinds go out, and other protocols' msgs as well. A low-level hardware configuration issue? Not using STM driver.

RM 0385 defines ETH_MACDBGR register fields that are not the same as in the SVD file v 1.1. This is on STM32F746G Disco.

Need to add an extra clock cycle to an I2C clock line

Re: At run-time my ETH_MACDBGR register samples always come back zero for all 32 bits. Does it require some enable bit to be set, or some idiom for when to read it? This is on an STM32F746G Disco.

Re: RM 0385 defines ETH_MACDBGR register fields that are not the same as in the SVD file v 1.1. This is on STM32F746G Disco.

Re: RM 0385 defines ETH_MACDBGR register fields that are not the same as in the SVD file v 1.1. This is on STM32F746G Disco.

Re: RM 0385 defines ETH_MACDBGR register fields that are not the same as in the SVD file v 1.1. This is on STM32F746G Disco.

Re: RM 0385 defines ETH_MACDBGR register fields that are not the same as in the SVD file v 1.1. This is on STM32F746G Disco.