About TAnde.5

TAnde.5 · 2021-09-22

Differences in setting up for SMBUS:On F4, I set the following bits in CR1: PEC POS ENPEC SMBTYPE SMBUSOn F7, are there similar bits?I see PECEN - is that the same as ENPEC on F4?How do you set up SMBUS on F7? (on F4, it was done with SMBTYPE and SMB...

TAnde.5 · 2021-08-25

I look at SR2 PEC contents (most significant 8 bits), and they always are zero. Is that normal?

TAnde.5 · 2021-09-13

Experimentation - NEED CONFIRMATION! I have removed NOPs and PE bit reset/set, and this appears to work. // 1. Set PEC bit in I2Cx_CR1 register. SET_BIT(reqB->hi2c->Instance->CR1, I2C_CR1_PEC); /* 2. Set POS bit in I2Cx_CR1 register. */ SET_BIT(r...

TAnde.5 · 2021-09-13

Any answers to my questions? Do I need to clear/set PE bit?Do I need to include NOPs between register writes?Are there any other things regarding PEC that I need to know?

TAnde.5 · 2021-08-26

Here is my code for working with PEC - it assumes that I2C is already in use, and adds code for PEC (and then subtracts...) // 1. Clear PE bit. CLEAR_BIT(reqB->hi2c->Instance->CR1, I2C_CR1_PE); __asm__ __volatile__("nop"); // 2. Set PEC bit in I2...

TAnde.5 · 2021-08-26

Sorry, formatting got messed up after pressing "Answer" button.

TAnde.5 · 2021-08-26

Is PEC not available when using HAL_I2C_Mem_Read if I have set the following bits in CR2: PEC, POS, ENPEC? Or do I need to be in SMBUS mode for PEC to be functional? Is there an appnote that explains how to make use of PEC?I am interfacing with an ex...

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STM32F7 SMBUS vs STM32F4 SMBUS

I think I am enabling packet error checking on specific I2C reads from a peripheral device. I do this by setting CR1 bits PEC, POS, and ENPEC, then doing a HAL_I2C_Mem_Read. I get expected results from the register read. Should PEC be zero?

Re: I think I am enabling packet error checking on specific I2C reads from a peripheral device. I do this by setting CR1 bits PEC, POS, and ENPEC, then doing a HAL_I2C_Mem_Read. I get expected results from the register read. Should PEC be zero?

Re: I think I am enabling packet error checking on specific I2C reads from a peripheral device. I do this by setting CR1 bits PEC, POS, and ENPEC, then doing a HAL_I2C_Mem_Read. I get expected results from the register read. Should PEC be zero?

Re: I think I am enabling packet error checking on specific I2C reads from a peripheral device. I do this by setting CR1 bits PEC, POS, and ENPEC, then doing a HAL_I2C_Mem_Read. I get expected results from the register read. Should PEC be zero?

Re: I think I am enabling packet error checking on specific I2C reads from a peripheral device. I do this by setting CR1 bits PEC, POS, and ENPEC, then doing a HAL_I2C_Mem_Read. I get expected results from the register read. Should PEC be zero?

Re: I think I am enabling packet error checking on specific I2C reads from a peripheral device. I do this by setting CR1 bits PEC, POS, and ENPEC, then doing a HAL_I2C_Mem_Read. I get expected results from the register read. Should PEC be zero?