I have two STM32F7 processors set up in SPI Master/Slave configuration. When the slave wants to transmit data to the master, it issues an interrupt and the master reads 4 bytes. The first two are the number of data bytes to read, the second two is a...

I used STM32CubeMX to build a very simple test case to output both the High Speed Clock (HSE) and Low Speed Clock (LSE) on output pins. I selected "Master Clock Output 1" and Master Clock Output 2" when I configured the input clocks. The HSE clock ...

When using a 16 bit data bus, the STM32CubeMX generates outputs for FMC_NBL1 and FMC_NBL0 that connect to the SDRAM DQMH and DQML pins. If the STM32CubeMX is configured for an 8 bit data bus, there is no DQM pin generated, although the 8 bit SDRAM h...