About SMoon.2

SMoon.2 · 2024-10-08

Working on setting RDP (read out protection) on STM32H750. We are using an external loader to be able to read from/write to external flash. The internal flash only contains a bootloader.1. Setting RDP to Level 1 doesn't prevent reading external flas...

SMoon.2 · 2023-06-16

I’m having some trouble related to using the FMC to interface with a LCD. We are using NE1 as chip select, LCD register select is A0, 16 bits of data. When I’m scoping the signals, I’m seeing the A0 go high during 16 bit writes to 0x60000000 (comman...

SMoon.2 · 2023-02-09

I'm attempting to use a quad encoder as user input. It is connected to the LPTIM1, so I was going to use the HAL functions with encoder mode. I want to be able to sense both the direction and amount of turn of the encoder in order to move selection ...

SMoon.2 · 2022-03-23

I've configured IWDG for my application (STM32L053). When I've halted the application during debugging, the IWDG is still triggering resets. I'm using a SEGGER j-link. I've attempted to use the __HAL_DBGMCU_FREEZE_IWDG() macro, but it doesn't seem...

SMoon.2 · 2023-06-20

Ok, I figured it out. Cascade of issues.Originally I was using HAL_SRAM_Write_16b and that requires a 32 bit aligned address (which should have been my first clue), which is why my command and data register address is a uint32_t *. Well turns out t...

SMoon.2 · 2023-06-20

> How exactly did you do that?I've done both:uint32_t *tft_cmd = (uint32_t *)0x60000000;*tft_cmd = val;ANDHAL_SRAM_Write_16b(&sg_hsram1, tft_cmd, &dataToSend, 1);> On the attached waveform, I see two consecutive writes, A0 being low at the first. I s...

SMoon.2 · 2023-06-20

@TKuo.1 which address line did you use as your register select for the LCD? I'm using A0 and having a lot of issues getting it working with 16 bit data width

SMoon.2 · 2023-06-19

I switched to using 8 bit data and it is basically working with a rough implementation...0x60000000 command, 0x60000001 data. A0 is now operating as I would expect it to. Also, I'm not getting alignment issues with the addresses regardless of the M...

SMoon.2 · 2023-06-16

Where did you find that bit explanation table?

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User Activity

STM32H750 External Flash Read Protect

STM32H750 FMC + LCD

Quad encoder user input using interrupts (LPTIM)

Unable to freeze IWDG during debugging using SEGGER j-link (STM32L053)

Re: STM32H750 FMC + LCD

Re: STM32H750 FMC + LCD

Re: Problem using MemToMem DMA from SRAM to FMC on STM32H755

Re: STM32H750 FMC + LCD

Re: Connecting LCD to FMC