Posted on May 17, 2011 at 13:23Thanks for reply. I am only interested in ST's ARM based controllers. 1. USB host and device in single port. 2. Ethernet 3. Minimum 4 uart (one multiprocessor communication) 4. Internal flash and RAM. I have gone throu...
Posted on May 17, 2011 at 13:23Hi friends, I am designing a new product, requirement of microcontoller is as follows. 1. USB host and device 2. Internal flash and RAM 3. Ethernet 4. 4 UART (min. two UART with 9 bit multiprocessor communication) Plea...
Posted on May 17, 2011 at 11:52I have gone through the revised datasheet of UPSD33xx. On page 271 written ''SRAM standby mode removed. Backup battery feature removed''.That means internal SRAM (xdata) backup battery feature removed ???When from new ...
Posted on May 17, 2011 at 11:52port 3 and 4 are 5V tolerant. Port 1 is not 5V tolerant bcoz it is shared with ADC. Port A,B,C,D of PSD module are 3.3V tolerant. The pins on Port 4 have a higher current capability than the pins on Ports 1 and 3.
Posted on May 17, 2011 at 09:59Is receive buffer contains the (currently received) data byte even if parity error occurs ? No matter data with any error !!!