Posted on November 05, 2008 at 19:06I am having problems with STR712s sometimes requiring a reset to get out of STOP mode. Most of the time, everything goes just fine, but if the WAKEUP line is asserted when trying to enter STOP, the processor somet...
Posted on March 08, 2007 at 13:42Are there any examples of an interrupt driven I2C read (using restart)? I actually need to do multiple read-write sequences from interrupts. I saw a previous post and the write was interrupt driven, but the reads wer...
Posted on March 01, 2006 at 10:12Thanks to everyone! Everything works great when I use CPSR to enable/disable the interrupts. I believe the limitations on using EIC->ICR should be documented because it is not obvious. Jon O'Donnell
Posted on February 28, 2006 at 10:28I'm sorry, but I do not believe ''three-stage'' does not necessarily means ''three instructions''. Also, I think the core may be influenced by the 128-bit flash memory bus architecture of the STR71x. My original c...
Posted on February 27, 2006 at 16:36Thanks. I added some do-nothing code after the EIC->ICR=0; and so far it appears to be working. Unfortunately, the bug is very sporadic and hard to reproduce to be guaranteed that it is fixed. How long is the pipe...