Posted on November 30, 2015 at 10:22Hi,
I am implementing SWIM Protocol for an own programmer.
It already works quite well with STM8S003 but I am facing difficulties with STM8L101.
I wonder why the 128 HSI-timing-pulse on SWIM entry from the STM8L is ~85us long (I would expect 64us).
I wonder if this is because the HSIT bit in SWIM_CSR is not set during reset and the hsi is not calibrated before OPT loading.
Does the STM8L trim the HSI after reset-release (which includes OPT-loading) and therefore change the SWIM-clock speed?
So do I need to recalibrate my SWIM timing after stm8 option bytes have been loaded by cpu after reset-release?
My STM8S005 show similar behaviour. The STM8S003 I have tested are older production and STM8L und STM8S005 are ''fresh''. I did not check the issue on new STM8S003 yet - maybe it is similar..?
Thanks & best regards,
Alex
#swim
