Hi,
I guess there is a bug in manual clock switching (file: stm8s_clk.c function:CLK_ClockSwitchConfig:(
/* Wait until the target clock source is ready */
while((((CLK->SWCR & CLK_SWCR_SWIF) != 0 ) && (DownCounter != 0)))
{
DownCounter--;
}
Must be changed to:
/* Wait until the target clock source is ready */
while((((CLK->SWCR & CLK_SWCR_SWIF) == 0) && (DownCounter != 0)))
{
DownCounter--;
}
As stated in reference manual, SWIF becomes 1 when target clock source is ready, so we must loop on it till it becomes 1 or timeouts
