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STM32H7A linker RAM area definitions and limitiations

Claydonkey
Senior

Are there any limitations to how AXI RAM can be partitioned by the linker script?

I have successfully divided SRAM1,2,3 (256K,384K,384K) into two partitions of 512K.

However when I tried:

RAM_EXEC (xrw) : ORIGIN = 0x24000000, LENGTH = 496K
  RAM_NOCACHE (xrw)      : ORIGIN = 0x2407C000, LENGTH = 528K
.DATA_RAM_NOCACHE  :
  {   . = ALIGN(4);
   _snocachedata = .;   
    *(.DATA_RAM_NOCACHE)         
    *(.DATA_RAM_NOCACHE*) 
    . = ALIGN(4);      
    _enocachedata = .;  
  } >RAM_NOCACHE
 
   _sinocachedata = LOADADDR(.DATA_RAM_NOCACHE);

and in the startup

...
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
.word  _sinocachedata
/* start address for the .data section. defined in linker script */
.word  _snocachedata
/* end address for the .data section. defined in linker script */
.word  _enocachedata
...
  ldr r0, =_snocachedata
  ldr r1, =_enocachedata
  ldr r2, =_sinocachedata
  movs r3, #0
   b LoopCopyDataInit
 
...

The Build analyser in cubeIDE reports back the expected areas after compilaiton but when executing code a MEM Handler Exception is thrown...

1 REPLY 1

Debug and step the code?

Generate a disassembly / listing file walk the codes/values ?

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